IDT8SLVD1204I datasheet(10/18 Pages) IDT

Part #	IDT8SLVD1204I

Description	Two selectable differential clock input pairs

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Manufacturer	IDT [Integrated Device Technology]

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IDT8SLVD1204I DATA SHEET

2:4, LVDS OUTPUT FANOUT BUFFER, 2.5V

10

REVISION A 07/10/14

2.5V LVPECL Clock Input Interface

The PCLK /nPCLK accepts LVPECL, LVDS, and other differential

signals. Both signals must meet the VPP and VCMR input

requirements. Figures 2A to 2C show interface examples for the

PCLK/ nPCLK input driven by the most common driver types. The

input interfaces suggested here are examples only. If the driver is

from another vendor, use their termination recommendation. Please

consult with the vendor of the driver component to confirm the driver

termination requirements.

Figure 2A. PCLK/nPCLK Input Driven by a

2.5V LVPECL Driver

Figure 2C. PCLK/nPCLK Input Driven by a

2.5V LVDS Driver

Figure 2B. PCLK/nPCLK Input Driven by a

2.5V LVPECL Driver with AC Couple

2.5V

PCLK

nPCLK

2.5V

LVPECL

Input

PCLK

nPCLK

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