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ICS874S02I Datasheet(PDF) 8 Page - Integrated Device Technology |
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ICS874S02I Datasheet(HTML) 8 Page - Integrated Device Technology |
8 / 16 page ICS874S02I 1:1 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR IDT™ / ICS™ LVDS CLOCK GENERATOR 8 ICS874S02BMI REV. AOCTOBER 16, 2008 Parameter Measurement Information, continued Differential Output Voltage Setup Offset Voltage Setup Application Information Recommendations for Unused Input and Output Pins Inputs: LVCMOS Control Pins All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1k Ω resistor can be used. Outputs: LVDS Outputs All unused LVDS output pairs can be either left floating or terminated with 100 Ω across. If they are left floating, there should be no trace attached. ➤ 100 out out LVDS DC Input VOD/∆ VOD V DD out out LVDS DC Input ➤ VOS/∆ VOS V DD |
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