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5P49V5935 Datasheet(PDF) 9 Page - Integrated Device Technology

Part No. 5P49V5935
Description  Generates up to four independent output frequencies
Download  33 Pages
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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5P49V5935 Datasheet(HTML) 9 Page - Integrated Device Technology

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REVISION B 07/13/15
9
PROGRAMMABLE CLOCK GENERATOR
5P49V5935 PRELIMINARY DATASHEET
Table 8: Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 5P49V5935. These ratings, which are standard values for IDT
commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect
product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Table 9: Recommended Operation Conditions
Note: VDDO1 and VDDO2 must be powered on either before or simultaneously with VDDD, VDDA and VDDO0.
Item
Rating
Supply Voltage, VDDA, VDDD, VDDO
3.465V
Inputs
CLKIN, CLKINB
Other inputs
0V to 1.2V voltage swing single-ended
-0.5V to VDDD
Outputs, VDDO (LVCMOS)
-0.5V to VDDO+ 0.5V
Outputs, IO (SDA)
10mA
Package Thermal Impedance,
JA
42
C/W (0 mps)
Package Thermal Impedance,
JC
41.8
C/W (0 mps)
Storage Temperature, TSTG
-65
C to 150C
ESD Human Body Model
2000V
Junction Temperature
125°C
Symbol
Parameter
Min
Typ
Max
Unit
VDDOX
Power supply voltage for supporting 1.8V outputs
1.71
1.8
1.89
V
VDDOX
Power supply voltage for supporting 2.5V outputs
2.375
2.5
2.625
V
VDDOX
Power supply voltage for supporting 3.3V outputs
3.135
3.3
3.465
V
VDDD
Power supply voltage for core logic functions
1.71
3.465
V
VDDA
Analog power supply voltage. Use filtered analog power
supply.
1.71
3.465
V
TA
Operating temperature, ambient
-40
+85
°C
CLOAD_OUT Maximum load capacitance (3.3V LVCMOS only)
15
pF
FIN
Integrated reference crystal
825
40
MHz
External reference clock CLKIN, CLKINB
1350
tPU
Power up time for all VDDs to reach minimum specified
voltage (power ramps must be monotonic)
0.05
5
ms


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