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MAX5019 Datasheet(PDF) 6 Page - Maxim Integrated Products |
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MAX5019 Datasheet(HTML) 6 Page - Maxim Integrated Products |
6 / 14 page ![]() Detailed Description Use the MAX5019/MAX5020 PWM current-mode con- trollers to design flyback- or forward-mode power sup- plies. Current-mode operation simplifies control-loop design while enhancing loop stability. An internal high- voltage startup regulator allows the device to connect directly to the input supply without an external startup resistor. Current from the internal regulator starts the controller. Once the tertiary winding voltage is estab- lished the internal regulator is switched off and bias current for running the IC is derived from the tertiary winding. The internal oscillator is set to 275kHz and trimmed to ±10%. This permits the use of small mag- netic components to minimize board space. Both the MAX5019 and MAX5020 can be used in power sup- plies providing multiple output voltages. A functional diagram of the IC is shown in Figure 1. Typical applica- tions circuits for forward and flyback topologies are shown in Figure 2 and Figure 3, respectively. For isolat- ed flyback power supplies use the circuit of Figure 4. Current-Mode Control The MAX5019/MAX5020 offer current-mode control operation with added features such as leading-edge blanking with dual internal path that only blanks the sensed current signal applied to the input of the PWM comparator. The current limit comparator monitors the CS pin at all times and provides cycle-by-cycle current limit without being blanked. The leading-edge blanking of the CS signal prevents the PWM comparator from prematurely terminating the on cycle. The CS signal contains a leading-edge spike that is the result of the MOSFET gate charge current, capacitive and diode reverse recovery current of the power circuit. Since this leading-edge spike is normally lower than the current limit comparator threshold, current limiting is not blanked and cycle-by-cycle current limiting is provided under all conditions. Use the MAX5019 in discontinuous flyback applications where wide line voltage and load current variation is expected. Use the MAX5020 for single transistor for- ward converters where the maximum duty cycle must be limited to less than 50%. Under certain conditions it may be advantageous to use a forward converter with greater than 50% duty cycle. For those cases use the MAX5019. The large duty cycle results in much lower operating primary RMS currents through the MOSFET switch and in most cases a smaller output filter inductor. The major disad- Current-Mode PWM Controllers with Integrated Startup Circuit 6 _______________________________________________________________________________________ Pin Description PIN NAME FUNCTION 1V+ High-Voltage Startup Input. Connect directly to an input voltage between 18V to 110V. Connects internally to a high-voltage linear regulator that generates VCC during startup. 2VDD VDD is the Input of the Linear Regulator that Generates VCC. For supply voltages less than 36V, VDD and V+ can both be connected to the supply. For supply voltages greater than 36V, VDD receives its power from the tertiary winding of the transformer and accepts voltages from 13V to 36V. Bypass to GND with a 4.7µF capacitor. 3FB Input of the Fixed-Gain Inverting Amplifier. Connect a voltage-divider from the regulated output to this pin. The noninverting input of the amplifier is referenced to 2.4V. 4 SS_ SHDN Soft-Start Timing Capacitor Connection. Ramp time to full current limit is approximately 0.45ms/nF. This pin is also the reference voltage output. Bypass with a minimum 10nF capacitor to GND. The device goes into shutdown when SS_ SHDN is pulled below 0.25V. 5CS Current Sense Input. Turns power switch off if VCS rises above 465mV for cycle-by-cycle current limiting. CS is also the feedback for the current-mode controller. CS is connected to the PWM comparator through a leading-edge blanking circuit. 6 GND Ground 7 NDRV Gate Drive. Drives a high-voltage external N-channel power MOSFET. 8VCC Regulated IC Supply. Provides power for the entire IC. VCC is regulated from VDD during normal operation and from V+ during startup. Bypass VCC with a 10 µF tantalum capacitor in parallel with 0.1µF ceramic capacitor to GND. |