ICS8S89832I Data Sheet

LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-LVDS FANOUT BUFFER

ICS8S89832AKI REVISION A JANUARY 11, 2010

11

©2010 Integrated Device Technology, Inc.

Power Considerations

This section provides information on power dissipation and junction temperature for the ICS8S89832I.

Equations and example calculations are also provided.

1.

Power Dissipation.

The total power dissipation for the ICS8S89832I is the sum of the core power plus the analog power plus the power dissipated in the load(s).

NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.

•

Power (core)

2. Junction Temperature.

Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The

maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond

wire and bond pad temperature remains below 125°C.

The equation for Tj is as follows: Tj =

θ

Tj = Junction Temperature

θ

Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)

In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance

θ

a multi-layer board, the appropriate value is 74.7°C/W per Table 6 below.

Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:

85°C + 0.249W * 74.7°C/W = 103.6°C. This is well below the limit of 125°C.

This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of

board (multi-layer).

θ

Meters per Second

01

2.5

Multi-Layer PCB, JEDEC Standard Test Boards

74.7°C/W

65.3°C/W

58.5°C/W