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STC3800 Datasheet(PDF) 4 Page - Connor-Winfield Corporation

Part # STC3800
Description  INTEGRATED - STRATUM 3E TIMING SOURCE
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Manufacturer  CONNOR-WINFIELD [Connor-Winfield Corporation]
Direct Link  http://www.conwin.com
Logo CONNOR-WINFIELD - Connor-Winfield Corporation

STC3800 Datasheet(HTML) 4 Page - Connor-Winfield Corporation

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Preliminary Data Sheet #: TM061
Page 4 of 48
Rev: P06
Date: 11/22/04
© Copyright 2001 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice
Pin Description
Table 1
Pin Name
Pin #
I/O
Description
Vdd2.5
A8,
2.5V Digital Power Supply
C4,
E1, E10,
H1, H5, H12
J7
Vdd3.3
E4, E6, E7, E9,
3.3V Digital Power Supply
H10,
J3,
L5,
M10
GND
A6,
Digital Ground
B2, B11,
F5, F6, F7, F10,
G2, G5, G6, G7,
K7, K10,
L1
AVdd2.5
E8,
2.5V Analog Power Supply
G3
AGND
E12,
Analog Ground
F2
TMS
L9
I
Controls the use of Boundary Scan
TCK
J8
I
Clock input for Boundary Scan
TDI
M9
I
Serial input for Boundary Scan
TDO
J10
O
Serial output for Boundary Scan
TRST
L12
I
Active low input pin for resetting boundary-scan circuitry
HM_Ref
B10
I
Hardware Mode for reference selection: 1: Enable, 0: Disable
Bmode
B9
I
Bus interface selection, 1: Parallel, 0: SPI
Dmode
C3
I
Selects the configuration data source, 0: Bus interface, 1: EEPROM
Reset
A1
I
Active low to reset the logic, minimum low time: 100 nS
CS
A2
I
Chip Select: Asserted low to enable bus interface
ALE or SCLK
B3
I
Address Latch Enable in parallel bus interface mode, SCLK in SPI mode
R/W or SDI
A3
I
Read/Write in Parallel Bus Interface Mode, SDI in SPI Mode
RDY or SDO
B1
O
Ready in Parallel Bus Mode, SDO in SPI Mode
INTR
C1
O
Active low to notify Micro-controller of events,
cleared by reading register Int_Event
AD0
A4
I/O
AD0: Address/Data bit 0 (multiplexed) in Parallel Bus Mode
AD1
B4
I/O
AD1: Address/Data bit 1 (multiplexed) in Parallel Bus Mode
AD2
A5
I/O
AD2: Address/Data bit 2 (multiplexed) in Parallel Bus Mode
AD3
B5
I/O
AD3: Address/Data bit 3 (multiplexed) in Parallel Bus Mode
AD4
B6
I/O
AD4: Address/Data bit 4 (multiplexed) in Parallel Bus Mode
AD5
A7
I/O
AD5: Address/Data bit 5 (multiplexed) in Parallel Bus Mode
AD6
B7
I/O
AD6: Address/Data bit 6 (multiplexed) in Parallel Bus Mode
AD7
B8
I/O
AD7: Address/Data bit 7 (multiplexed) in Parallel Bus Mode
M/S
J1
I
Master or Slave Selection, 1: Master, 0: Slave


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