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MAX3676 Datasheet(PDF) 3 Page - Maxim Integrated Products

Part No. MAX3676
Description  622Mbps, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier
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Maker  MAXIM [Maxim Integrated Products]
Homepage  http://www.maxim-ic.com
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MAX3676 Datasheet(HTML) 3 Page - Maxim Integrated Products

 
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622Mbps, 3.3V Clock-Recovery and
Data-Retiming IC with Limiting Amplifier
_______________________________________________________________________________________
3
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25°C.)
(Notes 3, 4)
Note 3: AC parameters are guaranteed by design and characterization.
Note 4: The MAX3676 is characterized with a PRBS of 223 - 1 maintaining a BER of
≤ 10-10 having a confidence level of 99.9%.
Note 5: A lower minimum input voltage of 2mVp-p is achievable; however, the LOP hysteresis is not guaranteed below 3.6mVp-p.
Note 6: Hysteresis = 20log(VRELEASE / VASSERT).
Note 7: R1 = 20kΩ, R2 = 3.0kΩ, resulting in VRELEASE ≈ 3.6mVp-p.
Note 8: Small-signal bandwidth cannot be measured directly.
Note 9: RSSI slope = [VRSSI2 - VRSSI1] / [20log (VID2 / VID1)].
Note 10: 1UI = 1 unit interval = (622.08MHz)-1 = 1.608ns.
Note 11: At jitter frequencies <10kHz, the jitter tolerance characteristics exceed the ITU/Bellcore specifications. The low-frequency
jitter tolerance outperforms the instrument’s measurement capability.
Note 12: See
Typical Operating Characteristics for worst-case distribution.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
RSSI Output Voltage
1.40
Limiting Amplifier Small-
Signal Bandwidth
BW
650
MHz
Power-Detect Hysteresis
36
dB
Input-Referred Noise
VN
80
µVRMS
Threshold Voltage
VTH
1.41
V
Differential Input Voltage
Range
VID
0.003
1.2000
Vp-p
CONDITIONS
(ADI+) - (ADI-) = 2mVp-p
(Note 8)
(Notes 6, 7)
ADI inputs
(Note 7)
BER < 10-10, ADI inputs (Note 5)
1.93
V
(ADI+) - (ADI-) = 20mVp-p
Jitter-Transfer Peaking
0.03
0.08
dB
Maximum Consecutive Input
Run Length (1 or 0)
1200
Bits
CF = 2.2µF
8.9
CF = 2.2µF
(Note 12)
3.64
Jitter Tolerance (Note 11)
0.55
0.77
0.45
0.69
CF = 2.2µF
Loop Bandwidth
250
500
kHz
26
RSSI Linearity
±0.7
%
(ADI+) - (ADI-) = 2mVp-p to 50mVp-p
RSSI Slope
mV/dB
(ADI+) - (ADI-) = 2mVp-p to 50mVp-p
(Note 9)
UI
f = 10kHz
f = 25kHz
f = 250kHz
f = 1MHz
CF = 2.2µF
Jitter Generation (Note 10)
2.0
2.6
mUI
LOP Threshold Accuracy
-2
+2
dB
(Note 7)
Clock Transition Time
tr, tf
205
245
ps
20% to 80%
Data Transition Time
tr, tf
180
230
ps
20% to 80%
Serial Clock-to-Q Delay
tCLK-Q
140
275
400
ps
Serial Clock Frequency
fSCLK
622.08
MHz


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