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74LV4053 Datasheet(PDF) 4 Page - NXP Semiconductors |
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74LV4053 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 27 page 74LV4053 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 5 — 18 September 2014 4 of 27 NXP Semiconductors 74LV4053 Triple single-pole double-throw analog switch 5. Pinning information 5.1 Pinning 5.2 Pin description (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to VCC. Fig 5. Pin configuration SOT38-4 and SOT109-1 Fig 6. Pin configuration SOT338-1 and SOT403-1 Fig 7. Pin configuration for SOT763-1 74LV4053 2Y1 VCC 2Y0 2Z 3Y1 1Z 3Z 1Y1 3Y0 1Y0 ES1 VEE S2 GND S3 001aak424 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 74LV4053 2Y1 VCC 2Y0 2Z 3Y1 1Z 3Z 1Y1 3Y0 1Y0 ES1 VEE S2 GND S3 001aak342 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 001aak343 VEE S2 ES1 3Y0 1Y0 3Z 1Y1 3Y1 1Z 2Y0 2Z Transparent top view 7 10 6 11 5 12 4 13 3 14 2 15 terminal 1 index area VCC(1) 74LV4053 Table 2. Pin description Symbol Pin Description E 6 enable input (active LOW) VEE 7 supply voltage GND 8 ground supply voltage S1, S2, S3 11, 10, 9 select input 1Y0, 2Y0, 3Y0 12, 2, 5 independent input or output 1Y1, 2Y1, 3Y1 13, 1, 3 independent input or output 1Z, 2Z, 3Z 14, 15, 4 common output or input VCC 16 supply voltage |
Similar Part No. - 74LV4053_15 |
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Similar Description - 74LV4053_15 |
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