Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

MAX3675 Datasheet(PDF) 3 Page - Maxim Integrated Products

Part No. MAX3675
Description  622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier
Download  16 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  MAXIM [Maxim Integrated Products]
Homepage  http://www.maxim-ic.com
Logo 

MAX3675 Datasheet(HTML) 3 Page - Maxim Integrated Products

 
Zoom Inzoom in Zoom Outzoom out
 3 / 16 page
background image
CF = 0.022µF
622Mbps, Low-Power, 3.3V Clock-Recovery
and Data-Retiming IC with Limiting Amplifier
_______________________________________________________________________________________
3
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +5.5V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25°C.)
(Notes 3, 4)
Note 3: AC parameters are guaranteed by design and characterization.
Note 4: The MAX3675 is characterized with a PRBS of 223 - 1 maintaining a BER of
≤ 10-10 having a confidence level of 99.9%.
Note 5: A lower minimum input voltage of 2mVp-p is achievable; however, the LOP hysteresis is not guaranteed below 3.6mVp-p.
Note 6: Hysteresis = 20log(VRELEASE / VASSERT)
Note 7: Small-signal bandwidth cannot be measured directly.
Note 8: RSSI slope = [VRSSI2 - VRSSI1] / [20log (VID2 / VID1)]
Note 9: 1UI = 1 unit interval = (622.08MHz)-1 = 1.608ns
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
RSSI Output Voltage
1.36
Limiting Amplifier Small-Signal Bandwidth
BW
800
MHz
Power-Detect Hysteresis
23
5
dB
Input Referred Noise
VN
100
µV
Threshold Voltage
VTH
1.40
V
13
mUI
Differential Input Voltage Range
VID
0.003
1.2000
Vp-p
Jitter Generation (Note 9)
6
CONDITIONS
(ADI+) - (ADI-) = 2mVp-p
(Note 7)
VRELEASE = 3.6mVp-p (Note 6)
ADI inputs
VRELEASE = 3.6mVp-p
CF = 2.2µF, RF = 52.3Ω
BER < 10-10, ADI inputs (Note 5)
1.93
V
(ADI+) - (ADI-) = 20mVp-p
Jitter-Transfer Peaking
0.08
dB
Maximum Consecutive Input
Run Length (1 or 0)
1000
Bits
Serial Clock-to-Q Delay
tCLK-Q
195
275
370
ps
Serial Clock Frequency
fSCLK
622.08
MHz
RF = 52.3Ω, CF = 2.2µF
8
RF = 52.3Ω,
CF = 2.2µF
1.50
3.35
Jitter Tolerance (Note 9)
0.25
0.60
0.20
0.50
3.5
MHz
CF = 2.2µF, RF = 52.3Ω
Loop Bandwidth
350
kHz
29
RSSI Linearity
±0.7
%
(ADI+) - (ADI-) = 2mVp-p to 50mVp-p
RSSI Slope
mV/dB
(ADI+) - (ADI-) = 2mVp-p to
50mVp-p (Note 8)
UI
f = 10kHz
f = 25kHz
f = 250kHz
f = 1MHz
CF = 0.022µF, RF = 523Ω
CF = 0.022µF, RF = 523Ω


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn