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MAX3675 Datasheet(PDF) 11 Page - Maxim Integrated Products

Part No. MAX3675
Description  622Mbps, Low-Power, 3.3V Clock-Recovery and Data-Retiming IC with Limiting Amplifier
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Maker  MAXIM [Maxim Integrated Products]
Homepage  http://www.maxim-ic.com
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MAX3675 Datasheet(HTML) 11 Page - Maxim Integrated Products

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622Mbps, Low-Power, 3.3V Clock-Recovery
and Data-Retiming IC with Limiting Amplifier
______________________________________________________________________________________
11
Reduced Power Consumption
Without the Limiting Amplifier
The limiting amplifier is biased independently from the
clock recovery circuitry. Grounding INSEL turns off the
limiting amplifier and selects the PECL DDI inputs.
Converting Average Optical Power
to Signal Amplitude
Many of the MAX3675’s specifications relate to input-
signal amplitude. When working with fiber optic
receivers, the input is usually expressed in terms of
average optical power and extinction ratio. The rela-
tions given in Table 2 and Figure 6 are helpful for con-
verting optical power to input signal when designing
with the MAX3675.
In an optical receiver, the input voltage to the limiting
amplifier can be found by multiplying the relationship in
Table 2 by the photodiode responsivity and transim-
pedance amplifier gain.
Optical Hysteresis
Power and hysteresis are often expressed in decibels.
By definition, decibels are always 10log (power). At the
inputs to the MAX3675 limiting amplifier, the power is
VIN2/R. If a receiver’s optical input power (x) increases
by a factor of two, and the preamplifier is linear, then the
voltage at the input to the MAX3675 also increases by a
factor of two.
The optical power increase is 10log(2x / x) = 10log(2) =
+3dB.
At the MAX3675, the voltage increase is:
In an optical receiver, the dB change at the MAX3675
always equals 2x the optical dB change.
The MAX3675’s typical voltage hysteresis is 3.0dB. This
provides an optical hysteresis of 1.5dB.
Jitter in Optical Receivers
Timing jitter, edge speeds, aberrations, optical disper-
sion, and attenuation all impact the performance of
high-speed clock recovery for SDH/SONET receivers
(Figure 7). These effects decrease the time available
for error-free data recovery by reducing the received
“eye opening” of non-return-to-zero (NRZ) transmitted
signals.
10
10
2
20
2
6
2
2
2
log
log(
)
log( )
2V
/ R
V/ R
IN
IN
()
==
= + dB
TIME
P0
P1
PAVE
Figure 6. Optical Power Relations
Table 2. Optical-Power Relations*
*Assuming a 50% average input data duty cycle.
SYMBOL
RELATION
Average
Power
PAVE
Extinction
Ratio
re
PARAMETER
Optical Power
of a “1”
P1
Optical Power
of a “0”
P0
Signal
Amplitude
PIN
P
= P0 + P1
AVE
()/2
r =
1 / P0
e
P
PP
r
r
AVE
e
e
12
1
=
+
PP
r
AVE
e
02
1
=+
()
/
PP
P
P
r
r
IN
AVE
e
e
=−
=
()
+
10
2
1
1
EYE DIAGRAM WITH NO TIMING JITTER
EFFECTS OF TIMING JITTER ON EYE DIAGRAM
TIME
MIDPOINT
TIME
MIDPOINT
Figure 7. Eye Diagram With and Without Timing Jitter


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