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74HC137 Datasheet(PDF) 11 Page - NXP Semiconductors

Part No. 74HC137
Description  3-to-8 line decoder, demultiplexer with address latches; inverting
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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74HC137 Datasheet(HTML) 11 Page - NXP Semiconductors

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9397 750 13804
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 03 — 11 November 2004
11 of 19
Philips Semiconductors
74HC137
3-to-8 line decoder, demultiplexer with address latches; inverting
[1]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD =CPD × VCC2 × fi × N+ ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
Tamb = −40 °C to +125 °C
tPHL, tPLH
propagation delay An to Yn
see Figure 6
VCC = 2.0 V
-
-
270
ns
VCC = 4.5 V
-
-
54
ns
VCC = 6.0 V
-
-
46
ns
propagation delay LE to Yn
see Figure 7
VCC = 2.0 V
-
-
285
ns
VCC = 4.5 V
-
-
57
ns
VCC = 6.0 V
-
-
48
ns
propagation delay E1 to Yn
see Figure 7
VCC = 2.0 V
-
-
220
ns
VCC = 4.5 V
-
-
44
ns
VCC = 6.0 V
-
-
38
ns
propagation delay E2 to Yn
see Figure 6
VCC = 2.0 V
-
-
220
ns
VCC = 4.5 V
-
-
44
ns
VCC = 6.0 V
-
-
38
ns
tTHL, tTLH
output transition time
see Figure 6
VCC = 2.0 V
-
-
110
ns
VCC = 4.5 V
-
-
22
ns
VCC = 6.0 V
-
-
19
ns
tW
LE pulse width HIGH
see Figure 8
VCC = 2.0 V
-
-
75
ns
VCC = 4.5 V
-
-
15
ns
VCC = 6.0 V
-
-
13
ns
tsu
set-up time An to LE
see Figure 8
VCC = 2.0 V
-
-
75
ns
VCC = 4.5 V
-
-
15
ns
VCC = 6.0 V
-
-
13
ns
th
hold time An to LE
see Figure 8
VCC = 2.0 V
-
-
45
ns
VCC = 4.5 V
-
-
9
ns
VCC = 6.0 V
-
-
8
ns
Table 8:
Dynamic characteristics …continued
GND = 0 V; tr =tf = 6 ns; CL = 50 pF.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit


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