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MAX2821 Datasheet(PDF) 7 Page - Maxim Integrated Products |
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MAX2821 Datasheet(HTML) 7 Page - Maxim Integrated Products |
7 / 23 page 2.4GHz 802.11b Zero-IF Transceivers _______________________________________________________________________________________ 7 AC ELECTRICAL CHARACTERISTICS—SYSTEM TIMING (continued) (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, fRF and fLO = 2400MHz to 2499MHz, fOSC = 22MHz or 44MHz, SHDNB = VIH, CSB = VIH, RBIAS = 12k Ω, ICP = +2mA, BWLOOP = 45kHz, registers set to default power-up settings, TA = +25°C, unless otherwise noted. Typical values are at VCC = +2.7V, fLO = 2437MHz, fOSC = 22MHz, unless otherwise noted.) AC ELECTRICAL CHARACTERISTICS—SERIAL INTERFACE TIMING (MAX2820/MAX2821 EV kit: VCC = +2.7V to +3.6V, registers set to default power-up settings, TA = +25 °C, unless otherwise noted. (Note 11) PARAMETER CONDITIONS MIN TYP MAX UNITS Standby-to-Receive Mode Standby to RX, fLO settles to within ±30kHz, relative to rising edge of RX_ON 5µs Standby-to-Transmit Mode Standby to TX, fLO settles to within ±30kHz, relative to rising edge of TX_ON 10 µs PARAMETER CONDITIONS MIN TYP MAX UNITS SERIAL INTERFACE TIMING (See Figure 1) tCSO SCLK rising edge to CSB falling edge wait time 5 ns tCSS Falling edge of CSB to rising edge of first SCLK time 5 ns tDS Data-to-serial clock setup time 5 ns tDH Data-to-clock hold time 10 ns tCH Serial clock pulse-width high 10 ns tCL Clock pulse-width low 10 ns tCSH Last SCLK rising edge to rising edge of CSB 5 ns tCSW CSB high pulse width 10 ns tCS1 Time between the rising edge of CSB and the next rising edge of SCLK 5 ns fCLK Clock frequency 50 MHz Note 1: Parameters are production tested at +25 °C only. Min/max limits over temperature are guaranteed by design and charac- terization. Note 2: Defined as the baseband differential RMS output voltage divided by the RMS input voltage (at the RF balun input). Note 3: Noise-figure specification excludes the loss of the external balun. The external balun loss is typically ~0.5dB. Note 4: CCK interferer at 25MHz offset. Desired signal equals -73dBm. Interferer amplitude increases until baseband output from interferer is 10dB below desired signal. Adjacent channel rejection = Pinterferer - Pdesired. Note 5: Measured at balun input. Two CW tones at -43dBm with 15MHz and 25MHz spacing from the MAX2820/MAX2821 channel frequency. IP3 is computed from 5MHz IMD3 product measured at the RX I/Q output. Note 6: Two CW interferers at -38dBm with 24.5MHz and 25.5MHz spacing from the MAX2820/MAX2821 channel frequency. IP2 is computed from the 1MHz IMD2 product measured at the RX I/Q output. Note 7: Output power measured after the matching and balun. TX gain is set to maximum. Note 8: Adjacent and alternate channel power relative to the desired signal. TX gain is adjusted until the output power is -1dBm. Power measured with 100kHz video BW and 100kHz resolution BW. Note 9: Time required to reprogram the PLL, change the operating channel, and wait for the operating channel center frequency to settle within ±10kHz of the nominal (final) channel frequency. Note 10: Relative amplitude of reference spurious products appearing in the TX RF output spectrum relative to a CW tone at 0.5MHz offset from the LO. Note 11: Min/max limits are guaranteed by design and characterization. |
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