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MAX1904 Datasheet(PDF) 23 Page - Maxim Integrated Products

Part # MAX1904
Description  500kHz Multi-Output, Low-Noise Power-Supply Controllers for Notebook Computers
Download  33 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX1904 Datasheet(HTML) 23 Page - Maxim Integrated Products

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500kHz Multi-Output, Low-Noise Power-Supply
Controllers for Notebook Computers
______________________________________________________________________________________
23
PTOTAL = The sum of the output power from all outputs
ITOTAL = PTOTAL / VOUT = The equivalent output cur-
rent referred to VOUT
where: VSEC = the minimum required rectified sec
ondary output voltage
VFWD = the forward drop across the secondary
rectifier
VOUT(MIN) = the minimum value of the main out
put voltage (from the Electrical
Characteristics tables)
VRECT = the on-state voltage drop across the
synchronous rectifier MOSFET
VSENSE = the voltage drop across the sense
resistor
In positive-output applications, the transformer sec-
ondary return is often referred to the main output volt-
age, rather than to ground, to reduce the needed turns
ratio. In this case, the main output voltage must first be
subtracted from the secondary voltage to obtain VSEC.
Selecting Other Components
MOSFET Switches
The high-current N-channel MOSFETs must be logic-
level types with guaranteed on-resistance specifica-
tions at VGS = 4.5V. Lower gate threshold
specifications are better (i.e., 2V max rather than 3V
max). Drain-source breakdown voltage ratings must at
least equal the maximum input voltage, preferably with
a 20% derating factor. The best MOSFETs will have the
lowest on-resistance per nanocoulomb of gate charge.
Multiplying RDS(ON) QG provides a good figure for
comparing various MOSFETs. Newer MOSFET process
technologies with dense cell structures generally per-
form best. The internal gate drivers tolerate >100nC
total gate charge, but 70nC is a more practical upper
limit to maintain best switching times.
In high-current applications, MOSFET package power
dissipation often becomes a dominant design factor.
I2R power losses are the greatest heat contributor for
both high-side and low-side MOSFETs. I2R losses are
distributed between Q1 and Q2 according to duty fac-
tor (see the following equations). Generally, switching
losses affect only the upper MOSFET, since the
Schottky rectifier clamps the switching node in most
cases before the synchronous rectifier turns on. Gate
charge losses are dissipated by the driver and don’t
heat the MOSFET. Calculate the temperature rise
according to package thermal-resistance specifications
to ensure that both MOSFETs are within their maximum
junction temperature at high ambient temperature. The
worst-case dissipation for the high-side MOSFET
occurs at both extremes of input voltage, and the
worst-case dissipation for the low-side MOSFET occurs
at maximum input voltage:
where: On-state voltage drop VQ_ = ILOAD RDS(ON)
CRSS = MOSFET reverse transfer capacitance
IGATE = DH driver peak output current capability
(1A typ)
20ns = DH driver inherent rise/fall time
Under output short-circuit, the MAX1904 synchronous
rectifier MOSFET suffers extra stress because its duty
factor can increase to greater than 0.9. It may need to
be oversized to tolerate a continuous DC short circuit.
During short circuit, the MAX1901/MAX1902’s output
undervoltage shutdown protects the synchronous recti-
fier under output short-circuit conditions.
To reduce EMI, add a 0.1µF ceramic capacitor from the
high-side switch drain to the low-side switch source.
Rectifier Clamp Diode
The rectifier diode is a clamp across the low-side MOS-
FET that catches the negative inductor swing during
the 60ns dead time between turning one MOSFET off
and each low-side MOSFET on. The latest generations
of MOSFETs incorporate a high-speed Schottky diode,
which serves as an adequate clamp diode. For
MOSFETs without integrated Schottky diodes, place a
Schottky diode in parallel with the low-side MOSFET.
PD
I
R
DUTY
VI
f
VC
I
ns
PD
I
R
DUTY
DUTY
V
V
V
V
upperFET
LOAD
DS ON
IN
LOAD
IN
RSS
GATE
upperFET
LOAD
DS ON
OUT
Q
IN
Q
×
× ×
×
+


×
=+
() (
)
2
2
21
20
1
()
()
()
/
-
-
L
VV
V
V
f
I
LIR
Turns Ratio N
VV
VV
V
PRIMARY
OUT
IN MAX
OUT
IN MAX
TOTAL
SEC
FWD
OUT MIN
RECT
SENSE
=
××
×
=
+
++
()
()
()
()
-


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