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74AHC_AHCT132 Datasheet(PDF) 3 Page - NXP Semiconductors |
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74AHC_AHCT132 Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 17 page 74AHC_AHCT132_6 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 06 — 4 May 2009 3 of 17 NXP Semiconductors 74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger 5. Pinning information 5.1 Pinning 5.2 Pin description (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration SO14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 132 1A VCC 1B 4B 1Y 4A 2A 4Y 2B 3B 2Y 3A GND 3Y mna406 1 2 3 4 5 6 7 8 10 9 12 11 14 13 001aac439 132 Transparent top view 2Y 3A 2B 3B 2A 4Y 1Y 4A 1B 4B GND GND(1) 3Y 1A VCC 6 9 5 10 4 11 3 12 2 13 terminal 1 index area Table 2. Pin description Symbol Pin Description 1A 1 data input A 1B 2 data input B 1Y 3 data output Y 2A 4 data input A 2B 5 data input B 2Y 6 data output Y GND 7 ground (0 V) 3Y 8 data output Y 3A 9 data input A 3B 10 data input B 4Y 11 data output Y 4A 12 data input A 4B 13 data input B VCC 14 supply voltage |
Similar Part No. - 74AHC_AHCT132_15 |
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Similar Description - 74AHC_AHCT132_15 |
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