2

Absolute

Symbol

Parameter

Units

Maximum

V

DS

V

5

V

GS

V

-5 to 1

V

GD

V

-5 to 1

I

DS

mA

100

I

GS

mA

1

P

diss

mW

270

P

in max.

(Vds=2.7V, Ids=10mA)

dBm

10

(Vds=0V, Ids=0mA)

dBm

10

T

CH

Channel Temperature

°C

150

T

STG

Storage Temperature

°C

-65 to 150



jc

°C/W

235



ESD (Human Body Model)

V

200



ESD (Machine Model)

V

25

Notes:

1. Operation of this device above any one of these parameters may

cause permanent damage.

2. Assumes DC quiescent conditions.

3. Source lead temperature is 25°C. Derate 4.3 mW/°C for T

L

> 87°C.

4. Thermal resistance measured using 150°C Liquid Crystal Measure-

ment method.

5. Device can safely handle +10 dBm RF Input Power as long as I

GS

is

limited to 1 mA. I

GS

at P

1dB

drive level is bias circuit dependent. See

applications section for additional information.

Figure 1. Typical I-V Curves.

0.4V

0.3V

0.5V

0.6V

0.7V

02

14

6

5

37

70

60

50

40

30

20

10

0

OIP3 (dBm)

Figure 2. OIP3 @ 2.7 V, 10 mA.

LSL = 22.0, Nominal = 24.2

22

23

25

24

26

300

250

200

150

100

50

0

Cpk = 2.02

Stdev = 0.36

-3 Std

GAIN (dB)

Figure 3. Gain @ 2.7 V, 10 mA.

USL = 18.5, LSL = 15.5, Nominal = 17.7

15

17

16

18

19

200

160

120

80

40

0

Cpk = 1.023

Stdev = 0.28

-3 Std

+3 Std

NF (dB)

Figure 4. NF @ 2.7 V, 10 mA.

USL = 0.9, Nominal = 0.6

0.43

0.63

0.53

0.83

0.73

0.93

240

200

160

120

80

40

0

Cpk = 3.64

Stdev = 0.031

+3 Std

Notes:

6. Distribution data sample size is 500 samples taken from 6 different wafers. Future wafers allocated to this product may have nominal values

anywhere between the upper and lower limits.

7. Measurements made on production test board. This circuit represents a trade-off between an optimal noise match and a realizeable match

based on production test equipment. Circuit losses have been de-embedded from actual measurements.