Fan Controller and Remote Temperature Sensor

with SMBus Serial Interface

10

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ALERT Interrupts

The ALERT interrupt output signal is latched and can

only be cleared by reading the Alert Response

remote diode, or when a high-to-low or low-to-high tran-

sition at I/O1 or I/O2 is detected.

The interrupt does not halt automatic conversions; new

temperature data continues to be available over the

SMBus interface after ALERT is asserted. The interrupt

output is open-drain so that devices can share a com-

mon interrupt line. The interface responds to the SMBus

Alert Response address, an interrupt pointer return-

address feature (see the Alert Response Address sec-

tion).

The ALERT interrupt latch is set when the temperature

exceeds an ALARM threshold. ALERT will not be set

again until the threshold is reprogrammed. This pre-

vents the ALERT latch from being set again during the

interval between reading the Alert Response address

and updating the offending alarm threshold. Note that

this behavior is identical to the MAX1618 but is slightly

different from the MAX1617, which continues to inter-

rupt until the temperature no longer exceeds the alarm

threshold. Note also that if some new alarm condition

occurs, such as crossing the other alarm threshold or

having a GPIO transition, a new interrupt is generated.

ALERT Response Address

The SMBus Alert Response interrupt pointer provides

quick fault identification for simple slave devices that

lack the complex, expensive logic needed to be a bus

master. Upon receiving an ALERT interrupt signal, the

host master can broadcast a receive byte transmission

to the Alert Response slave address (0001100b). Then

any slave device that generated an interrupt attempts

to identify itself by putting its own address on the bus

(Table 2).

The Alert Response can activate several different slave

If more than one slave attempts to respond, bus arbitra-

tion rules apply, and the device with the lower address

code wins. The losing device does not generate an

acknowledge and continues to hold the ALERT line low

until serviced. Successful reading of the alert response

address clears the interrupt latch.

Command Byte Functions

The 8-bit command byte register (Table 3) is the master

index that points to the MAX1669’s other registers. The

register’s POR state is 00000001b, so a receive byte

transmission (a protocol that lacks the command byte)

that occurs immediately after POR returns the current

remote temperature data.

One-Shot Conversion

The one-shot command immediately forces a new con-

version cycle to begin. In software standby mode

(STBY bit = 1), a new conversion starts, after which the

device returns to standby mode. If a conversion is in

progress when a one-shot command is received, the

command is ignored. If a one-shot command is

received in autoconvert mode (STBY bit = 0) between

conversions, a new conversion begins, the conversion

rate timer is reset, and the next automatic conversion

takes place after a full period.

Configuration Byte Functions

The configuration byte register (Table 4) is used to

mask (disable) interrupts, set the OVERT output polari-

ty, and put the device in software standby mode. Bit 1

of the configuration byte in Table 4 is for factory use

only and must be set to 1 (value at POR). This register’s

contents can be read back over the serial interface.

FAN PWM Frequency and

Duty Factor Control

The fan speed is controlled by the average voltage

applied to the fan. The average voltage is equal to the

product of the motor power-supply voltage and the

duty factor. The duty factor is equal to zero upon start-

up and it is software controlled. The FAN output fre-

quency is controlled by the PWM frequency register

unless this register’s code is set to 1111b (Table 5). A

PWM frequency code of 1111b puts the FAN output in

DAC mode. For all other codes, the FAN frequency is in

the 20Hz to 160Hz range as shown in Table 5. For the

possible synchronized frequencies, also see Table 5.

The FAN output duty factor is controlled by the FAN

duty factor register unless the PWM frequency code is

BIT

NAME

1

ADD1

2

ADD2

3

ADD3

4

ADD4

0 (LSB)

1

6

7 (MSB)

ADD7

ADD6

5

ADD5

FUNCTION

Logic 1

Provide the MAX1669

slave address

Table 2. Read Format for the Alert

Response Address (0001100b)