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MAX154AEWG Datasheet(PDF) 3 Page - Maxim Integrated Products |
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MAX154AEWG Datasheet(HTML) 3 Page - Maxim Integrated Products |
3 / 12 page ELECTRICAL CHARACTERISTICS (continued) (VDD = +5V, VREF+ = +5V, VREF- = GND, MODE 0, TA = TMIN to TMAX, unless otherwise noted). TIMING CHARACTERISTICS (Note 5) (VDD = +5V, VREF+ = +5V, VREF- = GND, MODE 0, TA = TMIN to TMAX, unless otherwise noted). Note 5: All input control signals are specified with tR = tF = 20ns (10% to 90% of +5V) and timed from a 1.6V voltage level. Note 6: Measured with load circuits of Figure 1 and defined as the time required for an output to cross 0.8V or 2.4V. Note 7: Defined as the time required for the data lines to change 0.5V when loaded with the circuits of Figure 2. CMOS High-Speed 8-Bit ADCs with Multiplexer and Reference _______________________________________________________________________________________ 3 (Note 6) (Note 6) CL = 50pF, RL = 5kΩ (Note 7) CL = 50pF CONDITIONS ns 60 tDH Data Hold Time ns 40 75 tINTH RD to INT Delay (Mode 1) ns 0 tCSH ns 0 tCSS CS to RD Setup Time CS to RD Hold Time ns 20 50 tACC2 Data Access Time After INT, Mode 0 ns 85 tACC1 Data Access Time After RD µs 1.6 2.0 tCRD Conversion Time (Mode 0) ns 30 40 tRDY CS to RDY Delay ns 0 tAS Multiplexer Address Setup Time ns 30 tAH Multiplexer Address Hold Time UNITS MIN TYP MAX SYMBOL ns 500 tP Delay Time Between Conversions 500 70 100 0 0 60 110 2.4 60 0 35 MAX15_C/E 600 70 100 0 0 70 120 2.8 60 0 40 MAX15_M MIN MAX MIN MAX ns 60 600 tRD RD Pulse Width (Mode 1) 80 500 80 400 DB0-DB7, INT; IOUT = -360µA CS = RD = 2.4V 5V ±5% for specified performance DB0-DB7, INT; RDY DB0-DB7, RDY; VOUT = 0V to VDD VDD = ±5% CONDITIONS LSB ±1/16 ±1/4 PSS Power-Supply Sensitivity V 4.0 VOH Output High Voltage mW 25 75 Power Dissipation mA 15 IDD Supply Current V 4.75 5.25 VDD Supply Voltage 0.4 V 0.4 VOL Output Low Voltage µA ±3 Three-State Output Current pF 58 COUT Output Capacitance (Note 4) UNITS MIN TYP MAX SYMBOL PARAMETER IOUT = 1.6mA IOUT = 2.6mA LOGIC OUTPUTS POWER-SUPPLY PARAMETER TA = +25°C Note 1: Total unadjusted error includes offset, full-scale, and linearity errors. Note 2: Specified with no external load unless otherwise noted. Note 3: Temperature drift is defined as change in output voltage from +25°C to TMIN or TMAX divided by (25 - TMIN) or (TMAX - 25). Note 4: Guaranteed by design. |
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