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MAX1460 Datasheet(PDF) 12 Page - Maxim Integrated Products

Part # MAX1460
Description  Low-Power, 16-Bit Smart ADC
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX1460 Datasheet(HTML) 12 Page - Maxim Integrated Products

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Low-Power, 16-Bit Smart ADC
12
______________________________________________________________________________________
There are three internal DSP registers that are directly
observable on the SDIO and SDO pins:
• S: 16-bit DSP Scratch or Accumulator register, con-
taining the result of the execution of the current
microcode instruction.
• P: 8-bit DSP Program Pointer register, which holds
the address of the instruction ROM microcode.
• PS: 8-bit DSP Program Store register. PS is the
instruction that the DSP is currently executing. PS is
the instruction ROM data at address P.
The DSP instructions relevant to the test system are list-
ed in Table 8.
After the test system sends the Start Conversion com-
mands 8 hex or A hex, SDIO and SDO are both
enabled as MAX1460 serial outputs. The test system
should disable (high impedance) its SDIO driver to
avoid a bus conflict at this time so that the MAX1460
can drive the pin. After the DSP executes each one of
the microcode instructions, the contents of the registers
S, P, and PS are output in a serial format (Figure 4).
A new DSP instruction and a new state of the S, P, and
PS registers are delivered every 16n + 9 clock cycles,
where n = 0, 1, 2... after the Start Conversion command
completes. The tester should latch the SDIO and SDO
0F
MSB
Configuration
LSB
0D
0E
1F
MSB
0B
Gain
LSB
EE Address (hex)
10
1D
09
Contents
1E
0A
1B
EE Address (hex)
20
19
Contents
1A
0C
1C
18
16
08
17
14
12
06
13
15
11
07
2F
MSB
G1
04
LSB
2D
02
2E
03
3F
MSB
05
2B
G2
LSB
01
EE Address (hex)
30
3D
29
Contents
3E
2A
3B
EE Address (hex)
40
39
Contents
3A
2C
3C
38
36
28
37
34
32
26
33
35
31
27
24
22
23
25
21
4F
MSB
Of0
LSB
4D
4E
5F
MSB
4B
Of1
LSB
EE Address (hex)
50
5D
49
Contents
5E
4A
5B
EE Address (hex)
60
59
Contents
5A
4C
5C
58
56
48
57
54
52
46
53
55
51
47
6F
MSB
Of2
44
LSB
6D
42
6E
43
7F
MSB
45
6B
DOFF
LSB
41
EE Address (hex)
70
7D
69
Contents
7E
6A
7B
EE Address (hex)
00
79
Contents
7A
6C
7C
78
76
68
77
74
72
66
73
75
71
67
64
62
63
65
61
Table 7. EEPROM Memory Map
D7
Register 7—DOFF
Register 8—Temperature
Signal
Register 0—Configuration
56
Register 9—Sensor Signal
D8
01
D9
Register 1—Gain
3B
Register 10—Compensated
Output D
D0
66 or 6C
EA
65 or 6B
D1
47
Register 2—G1
D2
11
D3
2E
Register 3—G2
Register 4—Of0
Register 5—Of1
D4
38
D5
03
Register 6—Of2
D6
22
INSTRUCTION
CODE (PS)
(HEX)
S REGISTER VALUE
PROGRAM
COUNTER
(P)
(HEX)
Table 8. Subset of DSP Instruction


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