Slave Address

A bus master initiates communication with a slave device

by issuing a START condition followed by a slave

address. When idle, the MAX1236–MAX1239 continu-

ously wait for a START condition followed by their slave

address. When the MAX1236–MAX1239 recognize their

slave address, they are ready to accept or send data.

Please refer to the table in the ordering information sec-

tion for the factory programmed slave address of the

selected device. The least significant bit (LSB) of the

address byte (R/W) determines whether the master is

writing to or reading from the MAX1236–MAX1239

(R/W = 0 selects a write condition, R/W = 1 selects a

read condition). After receiving the address, the

MAX1236–MAX1239 (slave) issues an acknowledge by

pulling SDA low for one clock cycle.

Bus Timing

At power-up, the MAX1236–MAX1239 bus timing is set

for fast-mode (F/S-mode), which allows conversion rates

up to 22.2ksps. The MAX1236–MAX1239 must operate

in high-speed mode (HS-mode) to achieve conversion

rates up to 94.4ksps. Figure 1 shows the bus timing for

the MAX1236–MAX1239’s 2-wire interface.

HS-Mode

At power-up, the MAX1236–MAX1239 bus timing is set

for F/S-mode. The bus master selects HS-mode by

addressing all devices on the bus with the HS-mode

master code 0000 1XXX (X = don’t care). After success-

fully receiving the HS-mode master code, the MAX1236–

MAX1239 issue a not-acknowledge, allowing SDA to be

pulled high for one clock cycle (Figure 8). After the not-

acknowledge, the MAX1236–MAX1239 are in HS-mode.

The bus master must then send a repeated START fol-

lowed by a slave address to initiate HS-mode communi-

cation. If the master generates a STOP condition, the

MAX1236–MAX1239 return to F/S-mode.

2.7V to 3.6V and 4.5V to 5.5V, Low-Power,

4-/12-Channel, 2-Wire Serial, 12-Bit ADCs

12

______________________________________________________________________________________

01

1

1

0

0

0

R/W

A

SLAVE ADDRESS

S

SCL

SDA

12

3

4

5

6

78

9

MAX1236/MAX1237

SEE ORDERING INFORMATION FOR SLAVE ADDRESS OPTIONS AND DETAILS.

Figure 7. MAX1236/MAX1237 Slave Address Byte

000

1

0X

X

X

A

HS-MODE MASTER CODE

SCL

SDA

S

Sr

F/S-MODE

HS-MODE

Figure 8. F/S-Mode to HS-Mode Transfer