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M13S128324A-2M Datasheet(PDF) 40 Page - Elite Semiconductor Memory Technology Inc.

Part No. M13S128324A-2M
Description  Double-data-rate architecture, two data transfers per clock cycle
Download  48 Pages
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Maker  ESMT [Elite Semiconductor Memory Technology Inc.]
Homepage  http://www.esmt.com.tw/index.asp
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M13S128324A-2M Datasheet(HTML) 40 Page - Elite Semiconductor Memory Technology Inc.

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ESMT
M13S128324A (2M)
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2011
Revision : 1.3
40/48
Read Interrupted by a Write & Burst Terminate (@ BL=8, CL=2)
CK E
CS
RA S
CA S
BA 0 , B A 1
WE
DQ S
DQ
01
234
56
78
9
10
HI GH
DM
CO M M A N D
BAa
Qa 0
Q a 1
READ
Db 0
db 5
Db 1
Db 4
Db 3
Db 2
Db 6
BAb
Cb
Burst
Terminate
WRITE
Db 7
CL K
CL K
A 8 /A P
AD D R
(A 0 ~ A n )
Ca
: D on’ t c ar e
101 22 B 3 2 R . B


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