M13S128324A-2M datasheet(38/48 Pages) ESMT | Double-data-rate architecture, two data transfers per clock cycle

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M13S128324A-2M Datasheet(PDF) 38 Page - Elite Semiconductor Memory Technology Inc.

Part No.	M13S128324A-2M

Description	Double-data-rate architecture, two data transfers per clock cycle

Download	48 Pages

Scroll/Zoom	100%

Maker	ESMT [Elite Semiconductor Memory Technology Inc.]

Homepage	http://www.esmt.com.tw/index.asp

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M13S128324A-2M Datasheet(HTML) 38 Page - Elite Semiconductor Memory Technology Inc.

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38 / 48 page

ESMT

M13S128324A (2M)

Elite Semiconductor Memory Technology Inc.

Publication Date : Aug. 2011

Revision : 1.3

38/48

Write Interrupted by a Read (@ BL=8, CL=2)

CK E

RA S

CA S

BA 0 , BA 1

DQS

HI G H

CO M M A N D

BAa

t WT R

Da 0

Da 1

D a 3

Da 2

WRITE

READ

CL K

BAb

Da 5

Da 4

Qb 1

Qb 3

Qb 2

Qb 4

Qb 5

A 8 /A P

AD D R

(A 0 ~ A n )

Qb 6

Qb 0

Qb 6

:D o n ’ t c a r e

10 12 2B 3 2 R . B

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