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M13S128324A-2M Datasheet(PDF) 32 Page - Elite Semiconductor Memory Technology Inc.

Part No. M13S128324A-2M
Description  Double-data-rate architecture, two data transfers per clock cycle
Download  48 Pages
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Maker  ESMT [Elite Semiconductor Memory Technology Inc.]
Homepage  http://www.esmt.com.tw/index.asp
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M13S128324A-2M Datasheet(HTML) 32 Page - Elite Semiconductor Memory Technology Inc.

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ESMT
M13S128324A (2M)
Elite Semiconductor Memory Technology Inc.
Publication Date : Aug. 2011
Revision : 1.3
32/48
Multi Bank Interleaving READ (@ BL=4, CL=2)
CK E
CS
RA S
CA S
BA 0 , BA 1
WE
DQ S
DQ
01
2
3
4
5
678
910
HI GH
DM
CO M M A N D
A 8 /AP
AD D R
(A 0 ~ A n )
BAa
Qb 0
Qb 1
Q b 3
Qb 2
ACTIVE
BAb
BAa
BAb
Ra
Rb
Ra
Ca
Cb
Qa 0
Qa 1
Qa 3
Qa 2
ACTIVE
READ
READ
Rb
CL K
CL K
tCCD
: D on’t c ar e
10 12 2B 3 2 R . B 1
tRCDRD
tRRD


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