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M13L2561616A-2A Datasheet(PDF) 45 Page - Elite Semiconductor Memory Technology Inc.

Part No. M13L2561616A-2A
Description  Double-data-rate architecture, two data transfers per clock cycle
Download  49 Pages
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Maker  ESMT [Elite Semiconductor Memory Technology Inc.]
Homepage  http://www.esmt.com.tw/index.asp
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M13L2561616A-2A Datasheet(HTML) 45 Page - Elite Semiconductor Memory Technology Inc.

 
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ESMT
M13L2561616A (2A)
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2012
Revision : 1.0
45/49
Simplified State Diagram
MRS
EMRS
Self
Refresh
Idle
Auto
Refresh
Precharge
Power
Down
REFS
REFA
REFSX
MRS
Bank
Active
Active
Power
Down
CKEH
CKEL
CKEL
Read
Write
Write
Read
Write
A
Precharge
PREALL
Write
Read
Read A
Read A
Read A
Write A
Write A
PRE
PRE
PRE
Read
CKEH
ACT
Automatic Sequence
Command Sequence
Precharge
PREALL
Power
On
Power
Applied
Burst Stop
Read
A
PRE
0911R.A
PREALL = Precharge All Banks
MRS = Mode Register Set
EMRS = Extended Mode Register Set
REFS = Enter Self Refresh
REFSX = Exit Self Refresh
REFA = Auto Refresh
CKEL = Enter Power Down
CKEH = Exit Power Down
ACT = Active
Write A = Write with Autoprecharge
Read A = Read with Autoprecharge
PRE = Precharge


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