M13L2561616A-2A datasheet(32/49 Pages) ESMT | Double-data-rate architecture, two data transfers per clock cycle

Part No.	M13L2561616A-2A

Description	Double-data-rate architecture, two data transfers per clock cycle

Download	49 Pages

Scroll/Zoom	100%

Manufacturer	ESMT [Elite Semiconductor Memory Technology Inc.]

Direct Link	http://www.esmt.com.tw/index.asp

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32 / 49 page

ESMT

M13L2561616A (2A)

Elite Semiconductor Memory Technology Inc.

Publication Date : Sep. 2012

Revision : 1.0

32/49

Multi Bank Interleaving READ (@ BL=4, CL=2)

CK E

CS

RA S

CA S

BA 0 , BA 1

WE

DQ S

DQ

01

2

3

4

5678

910

HI GH

DM

CO M M A N D

A 10 /A P

AD D R

(A 0 ~ A n )

BAa

Qb 0

Qb 1

Q b 3

Qb 2

ACTIVE

BAb

BAa

BAb

Ra

Rb

Ra

Ca

Cb

Qa 0

Qa 1

Qa 3

Qa 2

ACTIVE

READ

Rb

CL K

tCCD

:D o n ’ t c a r e

10 122 B 1 6 R . B

tRCD

tRRD

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M13L2561616A-2A Datasheet(PDF) 32 Page - Elite Semiconductor Memory Technology Inc.

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