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M13L2561616A-2A Datasheet(PDF) 31 Page - Elite Semiconductor Memory Technology Inc.

Part No. M13L2561616A-2A
Description  Double-data-rate architecture, two data transfers per clock cycle
Download  49 Pages
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Maker  ESMT [Elite Semiconductor Memory Technology Inc.]
Homepage  http://www.esmt.com.tw/index.asp
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M13L2561616A-2A Datasheet(HTML) 31 Page - Elite Semiconductor Memory Technology Inc.

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ESMT
M13L2561616A (2A)
Elite Semiconductor Memory Technology Inc.
Publication Date : Sep. 2012
Revision : 1.0
31/49
Timing Diagram
Basic Timing (Setup, Hold and Access Time @ BL=4, CL=2)
CK E
CS
RA S
CA S
BA 0 , B A 1
AD D R
(A 0 ~ A n )
WE
DQ S
DQ
01
23
4
5
6
7
8
9
10
HI GH
DM
CO M M A N D
A 10 /A P
BAa
BAb
Cb
Db 0
Db 1
Db 3
Db 2
t CK
t IS
t IH
t DQ S C K
t RP R E
t DQ SC K
Qa 0
Q a 1
Qa 2
Q a 3
t RP S T
Hi- Z
t DQ S S
tWPRE
t DQ S H
t DQ SL
tDS tDH tDS tDH
t WP S T
Hi -Z
Hi - Z
READ
WRITE
CL K
CL K
t CL
t CH
t CK
t CL
t CH
BAa
Ra
Ca
Ra
ACTIVE
t D QSQ
t QH
:D o n ’ t c a r e
Hi - Z
t LZ
t AC
t HZ
tWPRES
1 0 12 2B 1 6 R . B


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