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M13L32321A-2G Datasheet(PDF) 31 Page - Elite Semiconductor Memory Technology Inc.

Part # M13L32321A-2G
Description  Double-data-rate architecture, two data transfers per clock cycle
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Manufacturer  ESMT [Elite Semiconductor Memory Technology Inc.]
Direct Link  http://www.esmt.com.tw/index.asp
Logo ESMT - Elite Semiconductor Memory Technology Inc.

M13L32321A-2G Datasheet(HTML) 31 Page - Elite Semiconductor Memory Technology Inc.

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ESMT
M13L32321A (2G)
Elite Semiconductor Memory Technology Inc.
Publication Date : Oct. 2012
Revision : 1.0
31/48
Timing Diagram
Basic Timing (Setup, Hold and Access Time @ BL=4, CL=2)
CK E
CS
RA S
CA S
BA
AD D R
(A 0 ~ A7 , A 9 )
WE
DQ S
DQ
0
1
2
3
4
5
67
89
10
HI GH
DM
C O MMA N D
A 8 /AP
Cb
Db 0
Db 1
Db 3
Db 2
t CK
t IS
t IH
t DQ S C K
t RP R E
t DQ S C K
Qa 0
Q a 1
Q a 2
Q a 3
t R PST
Hi - Z
t DQ S S
tWPRE
t DQ S H
t DQ S L
tDS tDH tDS tDH
t WP S T
Hi - Z
Hi - Z
READ
WRITE
CL K
CL K
t CL
t CH
t CK
t CL
t CH
Ra
Ca
Ra
ACTIVE
t DQ S Q
t QH
:D o n ’ t c a r e
Hi - Z
t LZ
t AC
t HZ
tWPRES
1 1 1 0 1B 32 R. A


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