P4C1981L-20PC datasheet(4/13 Pages) PYRAMID

Part #	P4C1981L-20PC

Description	ULTRA HIGH SPEED 16K x 4 CMOS STATIC RAMS

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Manufacturer	PYRAMID [Pyramid Semiconductor Corporation]

Direct Link	http://www.pyramidsemiconductor.com

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4 / 13 page

P4C1981/1981L, P4C1982/1982L

Page 4 of 13

Document # SRAM114 REV B

Sym.

Parameter

Unit

-10

-12

-15

-20

-25

-35

-45

Min Max Min Max Min Max Min Max Min Max Min Max Min Max

t

RC

Read Cycle Time

10

12

15

20

25

35

45

ns

t

AA

Address Access

10

12

15

20

25

35

45

ns

Time

t

AC

Chip Enable

10

12

15

20

25

35

45

ns

Access Time

t

OH

Output Hold from

2

2222

2

ns

Address Change

t

LZ

Chip Enable to

2

2222

2

ns

Output in Low Z

t

HZ

Chip Disable to

6

7

8

10

15

ns

Output in High Z

t

OE

Output Enable

6

7

8

12

15

21

27

ns

Low to Data Valid

t

OLZ

Output Enable to

2

2222

2

ns

Output in Low Z

t

OHZ

Output Disable to

6

7

9

10

14

15

ns

Output in High Z

t

PU

Chip Enable to

0

0000

0

ns

Power Up Time

t

PD

Chip Disable to

10

12

15

20

25

30

ns

Power Down Time

AC CHARACTERISTICS—READ CYCLE

(V

CC = 5V ± 10%, All Temperature Ranges)

(2)

READ CYCLE NO.1 (OE

OE

OE controlled)(5)

Notes:

5. WE is HIGH for READ cycle.

6. CE

1, CE2 and OE are LOW for READ Cycle.

7. OE is LOW for the cycle.

8. ADDRESS must be valid prior to or coincident with, CE

1, and

CE

2 transition LOW.

9. Transition is measured ±200mV from steady state voltage

prior to change, with loading as specified in Figure 1.

10. Read Cycle Time is measured from the last valid address to

the first transitioning address.

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