RF Micro Devices Inc.

7628 Thorndike Road, Greensboro, NC 27409-9421

DS130906

For sales or technical support, contact RFMD at +1.336.678.5570 or customerservice@rfmd.com.

The information in this publication is believed to be accurate. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents or other rights of

third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended

application circuitry and specifications at any time without prior notice.

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RF3932D

Mounting and Thermal Considerations

measured using IR microscopy capturing the device under test temperature at the hottest spot of the die. At the same time, the

package temperature is measured using a thermocouple touching the backside of the die embedded in the device heat-sink but

sized to prevent the measurement system from impacting the results. Knowing the dissipated power at the time of the

measurement, the thermal resistance is calculated.

In order to achieve the advertised MTTF, proper heat removal must be considered to maintain the junction at or below the

maximum of 200°C. Proper thermal design includes consideration of ambient temperature and the thermal resistance from

ambient to the back of the package including heat-sinking systems and air flow mechanisms. Incorporating the dissipated DC

power, it is possible to calculate the junction temperature of the device.

DC Bias

saturated and uncontrolled drain current will destroy the transistor. The gate voltage must be taken to a potential lower than the

source voltage to pinch off the device prior to applying the drain voltage, taking care not to exceed the gate voltage maximum

RF Power transistor performance capabilities are determined by the applied quiescent drain current. This drain current can be

shown in the RF typical performance table is chosen to best represent the operational characteristics for this device, considering

manufacturing variations and expected performance. The user may choose alternate conditions for biasing this device based on

performance trade-offs.

GaN HEMT Capacitances

The physical structure of the GaN HEMT results in three terminal capacitors similar to other FET technologies. These

capacitances exist across all three terminals of the device. The physical manufactured characteristics of the device determine the

applied to the drain. During the measurement process, the parasitic capacitances of the package that holds the amplifier is

removed through a calibration step. Any internal matching is included in the terminal capacitance measurements. The capacitance