TB62D612FTG

2012-07-23

5

6．Programming the TB62D612FTG

The TB62D612FTG can be programmed by the SDA and SCLK signals.

The TB62D612FTG should be programmed using one of the following formats: (1) Serial Packet Format in Normal Programming

Mode or (3) Serial Packet Format in Special Mode.

(1) Serial Packet Format in Normal programming Mode

【

Typical】

Start Command

[11111111]

Slave address

8 bits

Sub-address

(Channel select)

8 bits

Data byte

(PWM configuration)

8 bits

Period Command

[10000001]

・

Normal programming Mode should be set as the following flow.

“Start Command”

“Slave address”

“Sub-address”

“Data byte”

“Period Command”

As for example of data input, refer to Page8.

・

Input data from SDA signal is written to the shift register at the rising edge of SCLK every 8 bit.

This data is transferred at the falling edge of the eighth CLK. So, at the eighth CLK, data should be inputted to the falling edge.

Block diagram of data setting part

In case of period command

SDA

SCLK

Data is transferred at

the falling edge of the

eighth SCLK.

Data is written to the shift register at the

rising edge of the SCLK.

Data is transferred at

the falling edge of the

eighth SCLK.

ﾃﾞｰﾀﾊﾞｲﾄ

R0

ﾃﾞｰﾀﾊﾞｲﾄ

G0

ﾃﾞｰﾀﾊﾞｲﾄ

B0

ﾃﾞｰﾀﾊﾞｲﾄ

R1

ﾃﾞｰﾀﾊﾞｲﾄ

B6

ﾃﾞｰﾀﾊﾞｲﾄ

R7

ﾃﾞｰﾀﾊﾞｲﾄ

G7

ﾃﾞｰﾀﾊﾞｲﾄ

B7

8bit

8bit

8bit

8bit

8bit

8bit

8bit

8bit

サブアドレス

8bit

スレーブアドレス

8bit

8ビットシフトレジスタ

終了コマンド

8bit

8bit

8bit

8bit

8bit

8bit

8bit

8bit

ＯＵＴ

R0

ＯＵＴ

G0

ＯＵＴ

B0

ＯＵＴ

R1

ＯＵＴ

B6

ＯＵＴ

R7

ＯＵＴ

G7

ＯＵＴ

B7

8bit

8bit

8bit

8bit

8bit

8bit

8bit

8bit

SDA

SCLK

8ビット

カウンタ

8bit shift-resister

8bit Shift-register

Slave Address

Sub Address

Data

Byte

Data

Byte

Data

Byte

R0

Data

Byte

G0

Data

Byte

B0

Data

Byte

R1

Data

Byte

R7

Data

Byte

G7

Data

Byte

B7

Terminal command

8 bit

counter