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RFFM4551SQ Datasheet(PDF) 10 Page - RF Micro Devices |
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RFFM4551SQ Datasheet(HTML) 10 Page - RF Micro Devices |
10 / 10 page RF Micro Devices Inc. 7628 Thorndike Road, Greensboro, NC 27409-9421 DS150211 For sales or technical support, contact RFMD at +1.336.678.5570 or customerservice@rfmd.com. The information in this publication is believed to be accurate. However, no responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent rights of RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice. 10 of 10 RFFM4551 Pin Names and Descriptions Pin Name Description 1 GND Ground connection 2 RX RF output port for the 802.11a/n/ac LNA. This port is matched to 50Ω and DC block is provided internally. 3 GND Ground connection 4 VDD Supply voltage for the LNA and PA regulator. See applications schematic for biasing and bypassing components. 5 PDET Power detector voltage for the TX path. May need external series R/shunt C to adjust voltage level and to filter RF noise. 6 PA_EN Control voltage for the PA and TX switch. See truth table for proper settings. 7 NC No Connect. This pin is not connected internally and can be left floating or connected to ground. 8 TX RF input port for the 802.11a/n PA. Input is matched to 50Ω and DC block is provided internally. 9 NC No Connect. This pin is not connected internally and can be left floating or connected to ground. 10 VCC Supply voltage for the PA. See applications schematic for biasing and bypassing components. 11 VCC Supply voltage for the PA. See applications schematic for biasing and bypassing components. 12 GND Ground connection 13 ANT RF bidirectional antenna port matched to 50Ω and DC block is provided internally. 14 GND Ground connection 15 CRX Receive switch control pin. See truth table 16 LNA_EN Control voltage for the LNA. When this pin is set to a low logic state, the bypass mode is enabled. PKG BASE GND Ground connection. The backside of the package should be connected to the ground plane through a short path, i.e., PCB vias under the device are recommended. |
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