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RFFC2071SQ Datasheet(PDF) 8 Page - RF Micro Devices

Part # RFFC2071SQ
Description  2.7GHz RF SYNTHESIZER/VCO WITH INTEGRATED RF MIXER
Download  23 Pages
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Manufacturer  RFMD [RF Micro Devices]
Direct Link  http://www.rfmd.com
Logo RFMD - RF Micro Devices

RFFC2071SQ Datasheet(HTML) 8 Page - RF Micro Devices

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RFFC2071/2072
DS140110
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or customerservice@rfmd.com.
The RFFC2071 mixer layout and pin placement has been optimized for high mixer-to-mixer isolation of greater than 60dB. The
mixers can be set up to operate in half duplex mode (1 mixer active) or full duplex mode (both mixers active). This selection is
done via control of MODE and by setting the FULLD bit. When in full duplex mode, either PLL register bank can be used, the LO
signal is routed to both mixers.
Serial Interface
All on-chip registers in the RFFC2071 and RFFC2072 are programmed using a proprietary 3-wire serial bus which supports
both write and read operations. Synthesizer programming, device configuration, and control are achieved through a mixture of
hardware and software controls. Certain functions and operations require the use of hardware controls via the ENBL, MODE,
and RESETB pins in addition to programming via the serial bus. Alternatively there is the option to control the chip completely
via the serial bus.
The serial data interface can be configured for 4-wire operation by setting the 4WIRE bit in the SDI_CTRL register high. Then
pin 26 is used as the data out pin, and pin 32 is the serial data in pin.
Hardware Control
Three hardware control pins are provided: ENBL, MODE, and RESETB.
The ENBL pin has two functions: to enable the analog circuits in the chip and to trigger the VCO auto-selection and coarse tun-
ing mechanisms. The VCO auto-selection and coarse tuning is initiated when the ENBL pin is taken high. Every time the fre-
quency of the synthesizer is reprogrammed, ENBL has to be asserted high to initiate these mechanisms and then to initiate the
PLL locking. Alternatively following the programming of a new frequency the PLL re-lock self clearing bit could be used.
If the device is left in the enabled state for long periods, it is recommended that VCO auto-selection and coarse tuning (band
selection) is performed for every 30°C change in temperature. The lock detect flag can be used to indicate when to perform
the VCO calibration, it shows that the VCO tuning voltage has drifted significantly with changing temperature.
The RESETB pin is a hardware reset control that will reset all digital circuits to their startup state when asserted low. The device
includes a power-on-reset function, so this pin should not normally be required, in which case it should be connected to the
positive supply.
The MODE pin controls which mixer(s) and PLL programming register bank is active.
Serial Data Interface Control
The normal mode of operation uses the 3-wire serial data interface to program the device registers, and three extra hardware
control lines: MODE, ENBL and RESETB.
When the device is under software control, achieved by setting the SIPIN bit in the SDI_CTRL register high, then the hardware
can be controlled via the SDI_CTRL register. When this is the case, the three hardware control lines are not required. If the
device is under software control, pins 1 and 9 can be configured as general purpose outputs (GPO).
Mode
FULLD
Active PLL
Register Bank
Active
Mixer
LOW
0
1
1
HIGH
0
2
2
LOW
1
1
1 and 2
HIGH
1
2
1 and 2


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