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LTC2156-12 Datasheet(PDF) 1 Page - Linear Technology |
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LTC2156-12 Datasheet(HTML) 1 Page - Linear Technology |
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1 / 32 page  1 21576512fb LTC2157-12/ LTC2156-12/LTC2155-12 For more information www.linear.com/LTC2157-12 TYPICAL APPLICATION FEATURES APPLICATIONS DESCRIPTION Dual 12-Bit 250Msps/ 210Msps/170Msps ADCs n Communications n Cellular Basestations n Software Defined Radios n Medical Imaging n High Definition Video n Testing and Measurement Instruments n 68.5dB SNR n 90dB SFDR n Low Power: 628mW/592mW/545mW Total n Single 1.8V Supply n DDR LVDS Outputs n Easy-to-Drive 1.5VP-P Input Range n 1.25GHz Full-Power Bandwidth S/H n Optional Clock Duty Cycle Stabilizer n Low Power Sleep and Nap Modes n Serial SPI Port for Configuration n Pin Compatible 14-Bit Versions n 64-Lead (9mm × 9mm) QFN Package TheLTC®2157-12/LTC2156-12/LTC2155-12areafamilyof dual 250Msps/210Msps/170Msps 12-bit A/D converters designedfordigitizinghighfrequency,widedynamicrange signals. They are perfect for demanding communications applications with AC performance that includes 68.5dB SNR and 90dB spurious free dynamic range (SFDR). The 1.25GHz input bandwidth allows the ADC to achieve high undersamplingratiowithverylowattenuation.Thelatency is only six clock cycles. DCspecsinclude±0.26LSBINL(typ),±0.16LSBDNL(typ) and no missing codes over temperature. The transition noise is 0.54LSBRMS. The digital outputs are double data rate (DDR) LVDS. The ENC+ and ENC– inputs can be driven differentially with asinewave,PECL,LVDS,TTL,orCMOSinputs.Anoptional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. L , LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. LTC2157-12: 32K Points 2-Tone FFT, fIN = 71MHZ and 69MHz, 250Msps FREQUENCY (MHz) 0 –120 –100 –80 –60 –40 0 20 40 60 80 21576512 G11 100 120 –20 S/H CORRECTION LOGIC OUTPUT DRIVERS 12-BIT PIPELINED ADC CORE CLOCK/DUTY CYCLE CONTROL DA10_11 • • • DA0_1 DB10_11 • • • DB0_1 CLOCK ANALOG INPUT 21576512 TA01 DDR LVDS DDR LVDS VDD OVDD OGND GND CHANNEL A S/H CORRECTION LOGIC OUTPUT DRIVERS 12-BIT PIPELINED ADC CORE ANALOG INPUT OGND OVDD CHANNEL B |
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Similar Description - LTC2156-12_15 |
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