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RF2053

DS140110

7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical

support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.

N=0 0101 1100

NUM=1100 1111 0011 0010 1000 0100

So the registers would be programmed:

P2_N=0 0101 1100

P2_NUM_MSB=1100 1111 0011 0010

P2_NUM_LSB=1000 0100

for a 23.92MHz reference, the frequency step size would be 1.4Hz. The minimum reference frequency that can be used is sim-

ply the maximum VCO frequency required divided by 511. For example for a VCO frequency of 2400MHz, the minimum refer-

ence frequency, is 2400/511, 4.697MHz (approx).

Phase Detector and Charge Pump

The chip provides a current output to drive an external loop filter. An external low noise operational amplifier can be used to

design an active loop filter or a passive design can be implemented. This depends on the tuning range of the external VCO. The

maximum charge pump output current is set by the value contained in the P2_CP_DEF field and CP_LO_I.

In the default state (P2_CP_DEF=31 and CP_LO_I=0) the charge pump current (ICPset) is 120uA. If CP_LO_I is set to 1 this

current is reduced to 30uA. Note that lowest phase noise within the loop bandwidth is achieved with the maximum charge

pump current.

The charge pump current can be altered by changing the value of P2_CP_DEF. The charge pump current is defined as:

ICP= ICPset*CP_DEF / 31

Changing the charge pump current will vary the loop filter response, higher current corresponding to a wider loop bandwidth.

The phase detector will operate with a maximum input frequency of 52MHz.

The loop filter calibration (KV_CAL) is not used by the RF2053 and is disabled by default.

Loop Filter

The PLL may be designed to use an active or a passive loop filter as required. The active loop filter uses an external low noise

op-amp. The CFG1:LF_ACT bit is set low in both cases so that the internal op-amp is disabled and a high impedance is pre-

sented to the LFILT1 pin. The RF205x Programming Tool software can assist with loop filter designs. Because the op-amp is

used in an inverting configuration in active mode, when the passive loop filter mode is selected the phase-detector polarity

should be inverted. For active mode, CFG1:PDP=1, for passive mode, CFG1:PDP=0.

The charge pump output voltage compliance range is typically +0.7V to +1.5V. For applications using a passive loop filter the

required VCO tuning voltage must fall within this voltage range under all conditions. When using an external op-amp as an inte-

grator for the loop filter, as shown above, the non-inverting terminal should be referenced to +1.1V. This holds the charge

pump output at this voltage in the center of its compliance range. The op-amp power supplies must be adequate to provide the

necessary VCO tuning voltage.

+

-

LFILT1

RF2053

Charge Pump

+1.1V

Typical active

loop filter

To VCO tuning