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CMLDM7002A Datasheet(PDF) 2 Page - Central Semiconductor Corp |
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CMLDM7002A Datasheet(HTML) 2 Page - Central Semiconductor Corp |
2 / 4 page CMLDM7002A CMLDM7002AG* CMLDM7002AJ SURFACE MOUNT SILICON DUAL N-CHANNEL ENHANCEMENT-MODE MOSFETS SOT-563 CASE - MECHANICAL OUTLINE LEAD CODE: 1) Gate Q1 2) Source Q1 3) Drain Q2 4) Gate Q2 5) Source Q2 6) Drain Q1 MARKING CODES: CMLDM7002A: L02 CMLDM7002AG*: C2G PIN CONFIGURATIONS ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS TYP MAX UNITS Crss VDS=25V, VGS=0, f=1.0MHz 5.0 pF Ciss VDS=25V, VGS=0, f=1.0MHz 50 pF Coss VDS=25V, VGS=0, f=1.0MHz 25 pF Qg(tot) VDS=30V, VGS=4.5V, ID=100mA 0.592 nC Qgs VDS=30V, VGS=4.5V, ID=100mA 0.196 nC Qgd VDS=30V, VGS=4.5V, ID=100mA 0.148 nC ton, toff VDD=30V, VGS=10V, ID=200mA RG=25Ω, RL=150Ω 20 ns CMLDM7002A (USA Pinout) CMLDM7002AG* LEAD CODE: 1) Source Q1 2) Gate Q1 3) Drain Q2 4) Source Q2 5) Gate Q2 6) Drain Q1 MARKING CODE: 02J CMLDM7002AJ (Japanese Pinout) * Device is Halogen Free by design www.centr a lsemi.com R8 (8-June 2015) |
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