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LT3070 Datasheet(PDF) 23 Page - Linear Technology

Part # LT3070
Description  5A, Low Noise, Programmable Output, 85mV Dropout Linear Regulator
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LT3070 Datasheet(HTML) 23 Page - Linear Technology

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LT3070
23
3070fc
For more information www.linear.com/LT3070
APPLICATIONS INFORMATION
The LT3070’s internal power and thermal limiting circuitry
protect it under overload conditions. For continuous nor-
mal load conditions, do not exceed the maximum junction
temperature of 125°C. Give careful consideration to all
sources of thermal resistance from junction to ambient.
This includes junction to case, case-to-heat sink interface,
heat sink resistance or circuit board to ambient as the
applicationdictates.Also,consideradditionalheatsources
mounted in proximity to the LT3070. The LT3070 is a
surface mount device and as such, heat sinking is ac-
complished by using the heat spreading capabilities of the
PC board and its copper traces. Surface mount heat sinks
and plated through-holes can also be used to spread the
heatgeneratedbypowerdevices.Junction-to-casethermal
resistance is specified from the IC junction to the bottom
of the case directly below the die. This is the lowest resis-
tance path for heat flow. Proper mounting is required to
ensure the best possible thermal flow from this area of the
packagetotheheatsinkingmaterial.Notethattheexposed
pad is electrically connected to GND.
Table 3 lists thermal resistance as a function of copper
area in a fixed board size. All measurements were taken
in still air on a 4-layer FR-4 board with 1 oz solid internal
planes and 2 oz top/bottom external trace planes with a
totalboardthicknessof1.6mm.PCBlayers,copperweight,
board layout and thermal vias affect the resultant thermal
resistance. For further information on thermal resistance
and high thermal conductivity test boards, refer to JEDEC
standard JESD51, notably JESD51-12 and JESD51-7.
Achieving low thermal resistance necessitates attention
to detail and careful PCB layout.
Table 3, UFD Plastic Package, 28-Lead QFN
COPPER AREA
BOARD AREA
THERMAL RESISTANCE
(JUNCTION-TO-AMBIENT)
TOPSIDE* BACK SIDE
2500mm2
2500mm2
2500mm2
30°C/W
1000mm2
2500mm2
2500mm2
32°C/W
225mm2
2500mm2
2500mm2
33°C/W
100mm2
2500mm2
2500mm2
35°C/W
*Device is mounted on topside
Calculating Junction Temperature
Example: Given an output voltage of 0.9V, an input voltage
range of 1.2V ± 5%, a BIAS voltage of 2.5V, a maximum
output current of 4A and a maximum ambient temperature
of 50°C, what will the maximum junction temperature be?
The power dissipated by the device equals:
IOUT(MAX) • (VIN(MAX) – VOUT) + (IBIAS – IGND) • VOUT
+ IGND • VBIAS
where:
IOUT(MAX) = 4A
VIN(MAX) = 1.26V
IBIAS at (IOUT = 4A, VBIAS = 2.5V) = 6.91mA
IGND at (IOUT = 4A, VBIAS = 2.5V) = 0.87mA
thus:
P = 4A(1.26V – 0.9V) + (6.91mA – 0.87mA)0.9V +
0.87mA(2.5V) = 1.448W
With the QFN package soldered to maximum copper
area, the thermal resistance is 30°C/W. So the junction
temperature rise above ambient equals:
1.448W at 30°C/W = 43.44°C
The maximum junction temperature equals the maximum
ambienttemperatureplusthemaximumjunctiontempera-
ture rise above ambient or:
TJMAX = 50°C + 43.44°C = 93.44°C
Applications that cannot support extensive PCB space
for heat sinking the LT3070 require a derating of output
current or increased airflow.
Paralleling Devices for Higher IOUT
MultipleLT3070smaybeparalleledtoobtainhigheroutput
current.Thisparallelingconceptborrowsfromthescheme
employed by the LT3080.
To accomplish this paralleling, tie the REF/BYP pins of
the paralleled regulators together. This effectively gives
an averaged value of multiple 600mV reference voltage
sources. Tie the OUT pins of the paralleled regulators to


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