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LTC3879 Datasheet(PDF) 8 Page - Linear Technology |
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LTC3879 Datasheet(HTML) 8 Page - Linear Technology |
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8 / 28 page  LTC3879 8 3879f PIN FUNCTIONS TRACK/SS (Pin 1): External Tracking and Soft-Start Input. The LTC3879 regulates VFB to the smaller of 0.6V or the voltage on the TRACK/SS pin. An internal 1μA pull-up current source is connected to this pin. A capacitor to ground at this pin sets the ramp time to the final regulated output voltage. Alternatively, a resistor divider on another voltage supply connected to this pin allows the output to track the other supply during start-up. PGOOD (Pin 2): Power Good Output. This open-drain logic output is pulled to ground when the output voltage is outside of a ±10% window around the regulation point. VRNG (Pin 3): VDS Sense Voltage Range Input. The maxi- mum allowed bottom MOSFET VDS sense voltage between SW and PGND is equal to (0.133)VRNG. The voltage applied to VRNG can be any value between 0.2V and 2V. If VRNG is tied to SGND, the device operates with a maximum valley current sense threshold of 30mV typical. If VRNG is tied to INTVCC, the device operates with a maximum valley current sense threshold of 75mV typical. MODE (Pin 4): MODE Input. Connect this pin to INTVCC to enable discontinuous mode for light load operation. Con- nect this pin to SGND to force continuous mode operation in all conditions. ITH (Pin 5): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V, with 0.8V corresponding to zero sense voltage (zero current). SGND (Pin 6): Signal Ground. All small-signal components should be connected to SGND. Connect SGND to PGND using a single PCB trace. ION (Pin 7): On-Time Current Input. Tie a resistor from VIN to this pin to set the one-shot timer current and thus the switching frequency. VFB (Pin 8): Error Amplifier Feedback Input. This pin con- nects the error amplifier to an external resistive divider from VOUT. RUN (Pin 9): Run Control Input. RUN below 1.5V disables switching by forcing TG and BG low. RUN less than 1.5V but greater than 0.7V enables all internal bias including the INTVCC output. RUN below 0.7V shuts down all bias and places the LTC3879 into micropower shutdown mode of approximately 18μA. There is an internal 1.2μA pull-up current source for operation with an open-collector RUN signal. VIN (Pin 10): Main Input Supply. The supply voltage can range from 4V to 38V. For increased noise immunity de- couple this pin to PGND with an RC filter. INTVCC (Pin 11): Internal 5.3V Regulator Output. The driver and control circuits are powered from this voltage. Decouple this pin to PGND with a minimum of 1μF, 10V X5R or X7R ceramic capacitor. BG (Pin 12): Bottom Gate Drive. This pin drives the gate of the bottom N-Channel power MOSFET between PGND and INTVCC. PGND (Pin 13): Power Ground. Connect this pin as close as practical to the source of the bottom N-channel power MOSFET, the (–) terminal of CINTVCC and the (–) terminal of CVIN. SW (Pin 14): Switch Node. The (–) terminal of the bootstrap capacitor, CB, connects to this node. This pin swings from a diode voltage below ground up to VIN. TG (Pin 15): Top Gate Drive. This pin drives the gate of the top N-channel power MOSFET between SW and BOOST. BOOST (Pin 16): Boosted Floating Driver Supply. The (+) terminal of the bootstrap capacitor, CB, connects to this node. This node swings from (INTVCC – VSCHOTTKY) to VIN + (INTVCC – VSCHOTTKY). Exposed Pad (Pin 17): The Exposed Pad is SGND and must be soldered to the PCB. |
Similar Part No. - LTC3879_15 |
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Similar Description - LTC3879_15 |
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