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LTC1871-1 Datasheet(PDF) 28 Page - Linear Technology

Part # LTC1871-1
Description  Wide Input Range, No RSENSE Current Mode Boost, Flyback and SEPIC Controller
Download  36 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1871-1 Datasheet(HTML) 28 Page - Linear Technology

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LTC1871-1
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APPLICATIONS INFORMATION
choice is AVX TPS series of surface mount tantalum. Also,
ceramic capacitors are now available with extremely low
ESR, ESL and high ripple current ratings.
SEPIC Converter: Input Capacitor Selection
The input capacitor of a SEPIC converter is less critical
than the output capacitor due to the fact that an inductor
is in series with the input and the input current waveform
is triangular in shape. The input voltage source impedance
determines the size of the input capacitor which is typi-
cally in the range of 10μF to 100μF. A low ESR capacitor
is recommended, although it is not as critical as for the
output capacitor.
The RMS input capacitor ripple current for a SEPIC con-
verter is:
IRMS(CIN) =
1
12
• IL
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to
the input of the converter and solid tantalum capacitors
can fail catastrophically under these conditions. Be sure
to specify surge-tested capacitors!
SEPIC Converter: Selecting the DC Coupling Capacitor
The coupling capacitor C1 in Figure 16 sees nearly a rectan-
gular current waveform as shown in Figure 17. During the
switch off-time the current through C1 is IO(VO/VIN) while
approximately – IO flows during the on-time. This current
waveform creates a triangular ripple voltage on C1:
VC1(P P) =
IO(MAX)
C1• f
VO
VIN + VO + VD
The maximum voltage on C1 is then:
VC1(MAX) = VIN +
VC1(P P)
2
which is typically close to VIN(MAX). The ripple current
through C1 is:
IRMS(C1) =IO(MAX)
VO + VD
VIN(MIN)
The value chosen for the DC coupling capacitor normally
starts with the minimum value that will satisfy 1) the RMS
current requirement and 2) the peak voltage requirement
(typically close to VIN). Low ESR ceramic and tantalum
capacitors work well here.
SEPIC Converter Design Example
The design example given here will be for the circuit shown
in Figure 18. The input voltage is 5V to 15V and the output
is 12V at a maximum load current of 1.5A (2A peak).
1. The duty cycle range is:
D
=
VO + VD
VIN + VO + VD
= 45.5% to 71.4%
2. The operating mode chosen is pulse skipping, so the
MODE/SYNC pin is shorted to INTVCC.
3. The operating frequency is chosen to be 300kHz to
reduce the size of the inductors; the resistor from the
FREQ pin to ground is 80k.
4. An inductor ripple current of 40% is chosen, so the peak
input current (which is also the minimum saturation
current) is:
IL1(PEAK) = 1+
2
•IO(MAX)
VO + VD
VIN(MIN)
= 1+
0.4
2
• 1.5 •
12
+ 0.5
5
= 4.5A
The inductor ripple current is:
IL = •IO(MAX)
DMAX
1– DMAX
= 0.4 •1.5 •
0.714
1– 0.714
= 1.5A


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