 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
LTC3713 Datasheet(PDF) 9 Page - Linear Technology |
|
||||||||||||||||||||||||||||||
LTC3713 Datasheet(HTML) 9 Page - Linear Technology |
|
|
9 / 24 page  9 LTC3713 3713fa Main Control Loop The LTC3713 is a current mode controller for DC/DC step-down converters designed to operate from low input voltages. It incorporates a boost converter with a buck regulator. Buck Regulator Operation In normal operation, the top MOSFET is turned on for a fixed interval determined by a one-shot timer OST. When the top MOSFET is turned off, the bottom MOSFET is turned on until the current comparator ICMP trips, restart- ing the one-shot timer and initiating the next cycle. Induc- tor current is determined by sensing the voltage between the SENSE+ and SENSE– pins using the bottom MOSFET on-resistance . The voltage on the ITH pin sets the com- parator threshold corresponding to inductor valley cur- rent. The error amplifier EA adjusts this voltage by com- paring the feedback signal VFB1 from the output voltage with an internal 0.8V reference. If the load current in- creases, it causes a drop in the feedback voltage relative to the reference. The ITH voltage then rises until the average inductor current again matches the load current. At low load currents, the inductor current can drop to zero and become negative. This is detected by current reversal comparator IREV which then shuts off M2, resulting in discontinuous operation. Both switches will remain off with the output capacitor supplying the load current until the ITH voltage rises above the zero current level (0.8V) to initiate another cycle. Discontinuous mode operation is disabled by comparator F when the FCB pin is brought below 0.8V, forcing continuous synchronous operation. The operating frequency is determined implicitly by the top MOSFET on-time and the duty cycle required to maintain regulation. The one-shot timer generates an on- time that is proportional to the ideal duty cycle, thus holding frequency approximately constant with changes in VIN. The nominal frequency can be adjusted with an external resistor RON. Overvoltage and undervoltage comparators OV and UV pull the PGOOD output low if the output feedback voltage exits a ±7.5% window around the regulation point. Furthermore, in an overvoltage condition, M1 is turned off OPERATIO and M2 is turned on and held on until the overvoltage condition clears. Foldback current limiting is provided if the output is shorted to ground. As VFB1 drops, the buffered current threshold voltage ITHB is pulled down by clamp Q3 to a 1V level set by Q4 and Q6. This reduces the inductor valley current level to one sixth of its maximum value as VFB1 approaches 0V. Pulling the RUN/SS pin low forces the controller into its shutdown state, turning off both M1 and M2. Releasing the pin allows an internal 1.2 µA current source to charge up an external soft-start capacitor CSS. When this voltage reaches 1.5V, the controller turns on and begins switch- ing, but with the ITH voltage clamped at approximately 0.6V below the RUN/SS voltage. As CSS continues to charge, the soft-start current limit is removed. INTVCC Power Power for the top and bottom MOSFET drivers and most of the internal controller circuitry is derived from the INTVCC pin. The top MOSFET driver is powered from a floating bootstrap capacitor CB. This capacitor is re- charged from INTVCC through an external Schottky diode DB when the top MOSFET is turned off. Boost Regulator Operation The 5V power source for INTVCC can be provided by a current mode, internally compensated fixed frequency step-up switching regulator that has been incorporated into the LTC3713. Operation can be best understood by referring to the Functional Diagrams. Q1 and Q2 form a bandgap refer- ence core whose loop is closed around the output of the regulator. The voltage drop across R5 and R6 is low enough such that Q1 and Q2 do not saturate, even when VIN2 is 1V. When there is no load, VFB2 rises slightly above 1.23V, causing VC (the error amplifier’s output) to de- crease. Comparator A2’s output stays high, keeping switch Q3 in the off state. As increased output loading causes the VFB2 voltage to decrease, A1’s output increases. Switch current is regulated directly on a cycle-by-cycle basis by the VC node. The flip-flop is set at the beginning of each |
Similar Part No. - LTC3713_15 |
|
Similar Description - LTC3713_15 |
|
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
