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LF3347 Datasheet(PDF) 1 Page - LOGIC Devices Incorporated |
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LF3347 Datasheet(HTML) 1 Page - LOGIC Devices Incorporated |
1 / 10 page DEVICES INCORPORATED Video Imaging Products LF3347 High-Speed Image Filter with Coefficient RAM 08/16/2000–LDS.3347-G 1 u u u u u 83 MHz Data Input and Compu- tation Rate u u u u u Four 12 x 12-bit Multipliers with Individual Data and Coefficient Inputs u u u u u Four 256 x 12-bit Coefficient Banks u u u u u 32-bit Accumulator u u u u u Selectable 16-bit Data Output with User-Defined Rounding and Limiting u u u u u Two’s Complement Operands u u u u u 3.3 Volt Power Supply u u u u u 5 Volt Tolerant I/O u u u u u 120-pin PQFP FEATURES DESCRIPTION LF3347 High-Speed Image Filter with Coefficient RAM DEVICES INCORPORATED The LF3347 consists of an array of four 12 x 12-bit registered multipliers followed by two summers and a 32-bit accumulator. The LF3347 provides four 256 x 12-bit coefficient banks which are capable of storing 256 different sets of filter coefficients for the multiplier array. All multi- plier data inputs are user accessible and can be updated every clock cycle with two’s complement data. The pipelined architecture has fully registered input and output ports and an asynchronous three-state output enable control to simplify the design of complex systems. A 32-bit accumulator allows cumula- tive word growth which may be internally rounded to 16-bits. Output data is updated every clock cycle and may be held under user control. The data inputs/outputs and control inputs are registered on the rising edge of CLK. The Control/Coeffi- cient Data Input, CC11-0, is registered on the rising edge of CCCLK. The LF3347 is ideal for performing pixel interpolation in image manipu- lation and filtering applications. The LF3347 can perform a bilinear inter- polation of an image (4-pixel kernels) at real-time video rates when used LF3347 BLOCK DIAGRAM D111-0 12 12 ENB1 D211-0 12 12 ENB2 25 D311-0 12 12 ENB3 D411-0 12 12 ENB4 25 S15-0 ACC OE CLK TO ALL REGISTERS Coefficient Bank 1 (256 x 12-bit) Coefficient Bank 2 (256 x 12-bit) Coefficient Bank 3 (256 x 12-bit) Coefficient Bank 4 (256 x 12-bit) A7-0 8 ENBA 16 16 CC11-0 12 LD Rounding Selecting Limiting Circuit Rounding/ Limiting Registers CCCLK 32 OCEN 466 NOTE: NUMBERS IN REGISTERS INDICATE NUMBER OF PIPELINE DELAYS 3 2222 SHIFT4-0 LMTEN SELLMT3-0 SELRND3-0 5 5 4 4 5 4 4 LF INTERFACE |
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