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LF3304QC12 Datasheet(PDF) 4 Page - LOGIC Devices Incorporated

Part # LF3304QC12
Description  Dual Line Buffer/FIFO
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Manufacturer  LODEV [LOGIC Devices Incorporated]
Direct Link  http://www.logicdevices.com
Logo LODEV - LOGIC Devices Incorporated

LF3304QC12 Datasheet(HTML) 4 Page - LOGIC Devices Incorporated

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DEVICES INCORPORATED
LF3304
Dual Line Buffer/FIFO
4
Video Imaging Products
08/16/2000–LDS.3304-F
LDB — RAM Array B Load
When LDB is LOW, data on BIN11-0 is
latched in the LF3304 on the rising
edgeofWCLKB.
WENA — Write Enable A
If WENA is LOW, data on AIN11-0 is
written to the device on the rising edge
of WCLKA. When RAM Array A is
full, WENA is ignored.
RENA — Read Enable A
If RENA is LOW, data from RAM Array
A is read and presented on AOUT11-0
after tD has elapsed from the rising
edge of RCLKA if the output port is
enabled. If RENA goes HIGH, the last
value loaded in the RAM Array A
output register will remain unchanged.
When RAM Array A is empty, RENA is
ignored.
WENB — Write Enable B
If WENB is LOW, data on BIN11-0 is
written to the device on the rising edgle
of WCLKB. When RAM Array B is full,
WENB is ignored.
RENB — Read Enable B
If RENB is LOW, data from RAM Array
B is read and presented on BOUT11-0
after tD has elapsed from the rising
edge of RCLKB if the output port is
enabled. If RENB goes HIGH, the last
value loaded in the RAM Array B
output register will remain unchanged.
When RAM Array B is empty, RENB is
ignored.
RWA — Reset Write A
The write address pointer is reset to the
first physical location when RWA is set
LOW. After power up, the LF3304
requires a Reset Write for initialization
because the write address pointer is not
defined at that time.
RRA — Reset Read A
The read address pointer is reset to the first
physical location when RRA is set LOW.
Afterpowerup,theLF3304requiresaReset
Read for initialization because the read
address pointer is not defined at that time.
RWB — Reset Write B
See RWA Description.
RRB — Reset Read B
See RRA description.
OEA — Output Enable A
When OEA is LOW, AOUT11-0 is
enabled for output. When OEA is
HIGH, AOUT11-0 is placed in a high-
impedence state. The flag outputs are
not affected by OEA.
OEB — Output Enable B
When OEB is LOW, BOUT11-0 is
enabled for output. When OEB is
HIGH, BOUT11-0 is placed in a high-
impedence state. The flag outputs are
not affected by OEB.
Outputs
AOUT11-0 — Data Output A
AOUT11-0 is the 12-bit registered data
outputport.
BOUT11-0 — Data Output B
BOUT11-0 is the 12-bit registered data
outputport.
FFA — Full Flag A
FFA goes LOW when RAM Array A is
full of data. When FFA is LOW, RAM
Array A can not be written to. The Full
Flag is synchronized to the rising edge
ofWCLKA.
EFA — Empty Flag A
EFA goes LOW when the read pointer is
equal to the write pointer, indicating that
RAM Array A is empty. When EFA is
LOW, read operations can not be
performed. The Empty Flag is synchro-
nized to the rising edge of RCLKA.
FFB — Full Flag B
FFBgoesLOWwhenRAMArrayBisfull
ofdata. WhenFFBisLOW,RAMArrayB
can not be written to. The Full Flag is
synchronizedtotherisingedgeofWCLKB.
EFB — Empty Flag B
EFB goes LOW when the read pointer
is equal to the write pointer, indicating
that RAM Array B is empty. When EFB
is LOW, read operations can not be
performed. The Empty Flag is synchro-
nized to the rising edge of RCLKB.
PAFA—ProgrammableAlmost-FullFlagA
PAFA goes LOW when the write
pointer is (Full – N) locations ahead of
the read pointer. N is the value stored
in the PAFA register and has no default
value. PAFA is synchronized to the
rising edge of WCLKA.
PAEA—ProgrammableAlmost-EmptyFlagA
PAEA goes HIGH when the write
pointer is (N + 1) location ahead of the
read pointer. N is the value stored in
the PAEA register and has no default
value. PAEA is synchronized to the
rising edge of RCLKA.
PAFB—ProgrammableAlmost-FullFlagB
PAFB goes LOW when the write pointer
is (Full – N) locations ahead of the read
pointer. N is the value stored in the
PAFB register and has no default value.
PAFB is synchronized to the rising
edgeofWCLKB.
PAEB—ProgrammableAlmost-EmptyFlagB
PAEB goes HIGH when the write
pointer is (N + 1) location ahead of the
read pointer. N is the value stored in
the PAEB register and has no default
value. PAEB is synchronized to the
rising edge of RCLKB.


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