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L4C383JC26 Datasheet(PDF) 9 Page - LOGIC Devices Incorporated

Part # L4C383JC26
Description  16-bit Cascadable ALU (Extended Set)
Download  11 Pages
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Manufacturer  LODEV [LOGIC Devices Incorporated]
Direct Link  http://www.logicdevices.com
Logo LODEV - LOGIC Devices Incorporated

L4C383JC26 Datasheet(HTML) 9 Page - LOGIC Devices Incorporated

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DEVICES INCORPORATED
L4C383
16-bit Cascadable ALU (Extended Set)
Arithmetic Logic Units
08/16/2000–LDS.383-E
9
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SWITCHING CHARACTERISTICS — MILITARY OPERATING RANGE (–55°C to +125°C)
GUARANTEED MAXIMUM COMBINATIONAL DELAYS Notes 9, 10 (ns)
To Output
From Input
FTAB = 0, FTF = 0
Clock
C0
S4-S0
FTAB = 0, FTF = 1
Clock
C0
S4-S0
FTAB = 1, FTF = 0
A15-A0, B15-B0
Clock
C0
S4-S0
FTAB = 1, FTF = 1
A15-A0, B15-B0
Clock
C0
S4-S0
L4C383-25*
F15-F0
N
OVF, Z
C16
14
24
24
24
—
—
18
18
—
222422
25
24
24
24
21
—
18
18
25
22
24
22
—
202522
14
———
—
—
18
18
—
222422
25
20
25
22
25
24
24
24
21
—
18
18
25
22
24
22
Input
A15-A0, B15-B0
C0
S4-S0
ENA, ENB, ENF
GUARANTEED MINIMUM SETUP AND HOLD TIMES WITH RESPECT TO CLOCK RISING EDGE Notes 9, 10 (ns)
L4C383-20*
FTAB = 0
FTAB = 1
Setup Hold
Setup Hold
62
12
2
12
0
12
0
16
0
16
0
60
6
0
L4C383-25*
FTAB = 0
FTAB = 1
Setup Hold
Setup Hold
72
14
2
14
0
14
0
19
0
19
0
70
7
0
TRI-STATE ENABLE/DISABLE TIMES Notes 9, 10, 11 (ns)
L4C383-25*
L4C383-20*
14
10
14
10
tENA
tDIS
CLOCK CYCLE TIME AND PULSE WIDTH Notes 9, 10 (ns)
Minimum Cycle Time
Highgoing Pulse
Lowgoing Pulse
L4C383-25*
L4C383-20*
20
18
86
86
L4C383-20*
F15-F0
N
OVF, Z
C16
14
20
20
20
—
—
16
16
—
182018
20
20
20
20
17
—
16
16
20
18
20
18
—
172017
14
—
—
—
—
—
16
16
—
182018
20
17
20
17
20
20
20
20
17
—
16
16
20
18
20
18
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*DISCONTINUED SPEED GRADE


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