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LTC1756EGN Datasheet(PDF) 8 Page - Linear Technology

Part # LTC1756EGN
Description  Smart Card Interface
Download  12 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1756EGN Datasheet(HTML) 8 Page - Linear Technology

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LTC1756
APPLICATIONS INFORMATION
Low Power Operation
The LTC1756 is inherently a low power device. When there
is no Smart Card present the supply current is less than
2.5
µA. When a Smart Card is present the LTC1756 oper-
ates with a quiescent current of only 75
µA, thus the
majority of power is consumed by charge pump losses
and the card itself. If the card can be made to consume less
power during idle times a significant power savings will be
achieved. Whenever possible Clock Stop Mode should be
used (or alternatively a very low “idling” clock speed).
Furthermore, in the Active state, the bidirectional pins
should all be relinquished whenever possible since there
is some static current flow when a bidirectional pin is
pulled down.
Overtemperature Fault Protection
An overtemperature circuit disables the chip and places
the LTC1765 in the Alarm state if the IC’s junction tem-
perature exceeds 150
°C.
The bypass capacitor at VIN is also important. Large dips
on the input supply due to ESR may cause problems with
the internal circuitry of the LTC1756. A good choice for the
input bypass capacitor is a 10
µF Y5V style ceramic
Dynamic Pull-Up Current Sources
The current sources on the bidirectional pins (DATA and
I/O) are dynamically activated to achieve a fast rise time
with a relatively small static current (Figure 1). Once a
bidirectional pin is relinquished, a small start-up current
begins to charge the node. An edge rate detector deter-
mines if the pin is released by comparing its slew rate with
an internal reference value. If a valid transition is detected,
a large pull-up current enhances the edge rate on the node.
The higher slew rate corroborates the decision to charge
the node thereby effecting a dynamic form of hysteresis.
Once the node has reached the power supply voltage the
internal comparator requires several hundred nanosec-
onds to reset. Pulling down on the pin before the reset
delay expires will result in a momentary contention and a
higher current flow. Therefore, the comparator delay sets
the upper limit on the maximum data rate of the bidirec-
tional channels to about 500kHz.
Figure 1. Dynamic Pull-Up Current Sources
+
δV
δt
ISTART
1756 F01
VREF
BIDIRECTIONAL PIN
VCC OR VIN


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