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LTC1735IGN Datasheet(PDF) 3 Page - Linear Technology

Part # LTC1735IGN
Description  High Efficiency Synchronous Step-Down Switching Regulator
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC1735IGN Datasheet(HTML) 3 Page - Linear Technology

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3
LTC1735
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formulas:
LTC1735CS, LTC1735IS: TJ = TA + (PD • 110 °C/W)
LTC1735CGN, LTC1735IGN: TJ = TA + (PD • 130°C/W)
Note 3: The LTC1735 is tested in a feedback loop that servos VOSENSE to
the balance point for the error amplifier (VITH = 1.2V).
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 5: Oscillator frequency is tested by measuring the COSC charge
current (IOSC) and applying the formula:
f
CpF
I
I
OSC
OSC
CHG
DIS
=
+


+


8 477 10
11
11
11
1
.(
)
()
Note 6: The minimum on-time condition corresponds to an inductor peak-
to-peak ripple current
≥40% of IMAX (see Minimum On-Time
Considerations in the Applications Information section).
Note 7: Rise and fall times are measured using 10% and 90% levels.
Delay times are measured using 50% levels.
ELECTRICAL CHARACTERISTICS The q denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 15V, VRUN/SS = 5V unless otherwise noted.
ISENSE
Sense Pins Total Source Current
VSENSE
= VSENSE+ = 0V
60
80
µA
tON(MIN)
Minimum On-Time
Tested with a Square Wave (Note 6)
160
200
ns
TG Transition Time:
(Note 7)
TG tr
Rise Time
CLOAD = 3300pF
50
90
ns
TG tf
Fall Time
CLOAD = 3300pF
50
90
ns
BG Transition Time:
(Note 7)
BG tr
Rise Time
CLOAD = 3300pF
50
90
ns
BG tf
Fall Time
CLOAD = 3300pF
40
80
ns
TG/BG t1D
Top Gate Off to Synchronous
CLOAD = 3300pF Each Driver
100
ns
Gate On Delay Time
TG/BG t2D
Synchronous Gate Off to Top
CLOAD = 3300pF Each Driver
70
ns
Gate On Delay Time
Internal VCC Regulator
VINTVCC
Internal VCC Voltage
6V < VIN < 30V, VEXTVCC = 4V
5.0
5.2
5.4
V
VLDO(INT)
Internal VCC Load Regulation
ICC = 0 to 20mA, VEXTVCC = 4V
0.2
1
%
VLDO(EXT)
EXTVCC Drop Voltage
ICC = 20mA, VEXTVCC = 5V
130
200
mV
VEXTVCC
EXTVCC Switchover Voltage
ICC = 20mA, EXTVCC Ramping Positive
q
4.5
4.7
V
VEXTVCC(HYS)
EXTVCC Hysteresis
0.2
V
Oscillator
fOSC
Oscillator Frequency
COSC = 43pF (Note 5)
265
300
335
kHz
fH/fOSC
Maximum Sync Frequency Ratio
1.3
fFCB(SYNC)
FCB Pin Threshold For Sync
Ramping Negative
0.9
1.2
V


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