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LTC6431-20 Datasheet(PDF) 11 Page - Linear Technology

Part # LTC6431-20
Description  20dB Gain Block, 50 IF Amplifier
Download  16 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC6431-20 Datasheet(HTML) 11 Page - Linear Technology

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LTC6431-20
11
643120f
For more information www.linear.com/LTC6431-20
APPLICATIONS INFORMATION
useful bandwidth of the bypass capacitor. The suggested
bypass capacitor network consists of two capacitors: a
low value 1000pF capacitor to handle high frequencies
in parallel with a larger 0.1µF capacitor to handle lower
frequencies. Use ceramic capacitors of an appropriate
physical size for each capacitance value (e.g., 0402 for the
1000pF and 0805 for the 0.1µF) to minimize the equivalent
series resistance (ESR) of the capacitor.
Low Frequency Stability
Most RF gain blocks suffer from low frequency instability.
Toavoidanystabilityissues,theLTC6431-20hasaninternal
feedback network that lowers the gain and matches the
inputandoutputimpedancesatfrequenciesabove20MHz.
This feedback network contains a series capacitor so if at
some low frequency the feedback fails, the gain increases
andgrossimpedancemismatchesoccur—indeedarecipe
for instability. Luckily this situation is easily resolved with
a parallel capacitor and resistor network on the input as
seen in Test Circuit A. This network provides resistive loss
at low frequencies and is bypassed by the parallel capaci-
tor within the desired band of operation. However, if the
LTC6431-20 is preceded by a low frequency termination,
such as a choke, the stability network is NOT required.
Test Circuit
The test circuit shown in Figure 2 is designed to allow
evaluation of the LTC6431-20 with standard single-ended
50Ω test equipment. The circuit requires a minimum of
externalcomponents.SincetheLTC6431-20isawideband
part, the evaluation test circuit is optimized for wideband
operation. Obviously, for narrowband applications the
circuit can be further optimized. As mentioned earlier,
input and output DC blocking capacitors are required as
this device is internally biased for optimal operation. A
frequency appropriate choke and decoupling capacitors
are required to provide DC bias to the RF OUT node. A 5V
supply should also be applied to both of the VCC pins on
the device. A suggested parallel 60pF, 350Ω network has
been added to the input to ensure low frequency stabil-
ity. The 60pF capacitance can be increased to improve
low frequency (<150MHz) performance. However, the
designer needs to be sure that the impedance presented
at low frequency will not create instability
Please note that a number of DNC pins are connected on
the demo board. These connections are not necessary for
normal circuit operation.
Exposed Pad and Ground Plane Considerations
As with any RF device, minimizing ground inductance
is critical. Care should be taken with board layout using
these exposed pad packages. The maximum allowable
number of minimum diameter via holes should be placed
underneath the exposed pad and connected to as many
ground plane layers as possible. This will provide good
RF ground and low thermal impedance. Maximizing the
copper ground plane will also improve heat spreading
and lower inductance. It is a good idea to cover the via
holes with a solder mask on the back side of the PCB to
prevent solder from wicking away from the critical PCB
to exposed pad interface.
The LTC6431-20 is a wide bandwidth part but it is not
intended for operation down to DC. The lower frequency
cutoff (20MHz) is limited by on-chip matching elements.


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