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LTC1530IS8 Datasheet(PDF) 8 Page - Linear Technology |
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LTC1530IS8 Datasheet(HTML) 8 Page - Linear Technology |
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8 / 24 page  8 LTC1530 G1 RISE/FALL 3300pF + 0.1 µF 10 µF 1530 F04a PVCC IFB PVCC 12V GND G1 G2 G2 RISE/FALL VOUT COMP COMP LTC1530 3300pF 90% 90% tr tNOL tNOL tf 50% 50% 50% 50% COMP G1 1530 F04b tSS 10% 10% Figure 4 OVERVIEW The LTC1530 is a voltage feedback, synchronous switch- ing regulator controller (see Block Diagram) designed for use in high power, low voltage step-down (buck) convert- ers. It includes an on-chip soft-start capacitor, a PWM generator, a precision reference trimmed to ±1%,twohigh power MOSFET gate drivers and all the necessary feed- back and control circuitry to form a complete switching regulator circuit running at 300kHz. The LTC1530 includes a current limit sensing circuit that uses the topside external N-channel power MOSFET as a current sensing element, eliminating the need for an external sense resistor. If the current comparator, CC, detects an overcurrent condition, the duty cycle is reduced by discharging the internal soft-start capacitor through a voltage-controlled current source. Under severe over- loads or output short-circuit conditions, the soft-start capacitor is pulled to ground and a start-up cycle is initiated. If the short circuit or overload persists, the chip repeats soft-start cycles and prevents damage to external components. THEORY OF OPERATION Primary Feedback Loop The LTC1530 compares the output voltage with the inter- nal reference at the error amplifier inputs. The error amplifier outputs an error signal to the PWM comparator. This signal is compared to the fixed frequency oscillator sawtooth waveform to generate the PWM signal. The PWM signal drives the external MOSFETs at the G1 and G2 pins. The resulting chopped waveform is filtered by LO and COUT which closes the loop. Loop frequency compensa- tion is typically accomplished with an external RC + C network at the COMP pin, which is the output node of the transconductance error amplifier. MIN, MAX Feedback Loops Two additional comparators in the feedback loop provide high speed fault correction in situations where the error amplifier cannot respond quickly enough. MIN compares the feedback signal to a voltage 3% below the internal reference. If the signal is below the comparator threshold, the MIN comparator overrides the error amplifier and forces the loop to maximum duty cycle, typically 86%. Similarly, the MAX comparator forces the output to 0% duty cycle if the feedback signal is greater than 3% above the internal reference. To prevent these two comparators from triggering due to noise, the MIN and MAX compara- tors’ response times are deliberately delayed by two to three microseconds. These comparators help prevent extreme output perturbations with fast output load current transients, while allowing the main feedback loop to be optimally compensated for stability. Thermal Shutdown The LTC1530 has a thermal protection circuit that disables both internal gate drivers if activated. G1 and G2 are held low and the LTC1530 supply current drops to about 1mA. TEST CIRCUITS APPLICATIO S I FOR ATIO |
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