8

LTC1196/LTC1198

CC

HARA TERISTICS

A

TYPICALPERFOR

CE

Maximum Clock Frequency vs

Supply Voltage

Gain vs Supply Voltage

SUPPLY VOLTAGE (V)

2.5

0.5

0.4

0.3

0.2

0.1

0

–0.1

–0.2

–0.3

–0.4

–0.5

3.5

4.5

5.0

1196/98 G10

3.0

4.0

5.5

6.0

SUPPLY VOLTAGE (V)

2.5

19

17

15

13

11

9

7

5

4.0

5.0

1196/98 G11

3.0

3.5

4.5

5.5

6.0

Maximum Clock Frequency vs

Source Resistance

ADC Noise vs Reference and

Supply Voltage

Sample-and-Hold Acquisition

Time vs Source Resistance

Digital Input Logic Threshold vs

Supply Voltage

Supply Voltage

SOURCE RESISTANCE (

Ω)

18

16

14

12

10

8

6

4

2

0

1

100

1k

100k

1196/98 G12

10

10k

–

+IN

–IN

TEMPERATURE (°C)

–55

100

90

80

70

60

50

40

30

20

10

0

–15

25

45

125

1196/98 G13

–35

5

65

85 105

SOURCE RESISTANCE (

Ω)

1

100

1000

10000

100

10k

1196/98 G15

10

1k

+

+IN

–IN

TEMPERATURE (°C)

–60

160

140

120

100

80

60

40

20

0

100

1196/98 G18

–20

20

60

140

–40

0

40

80

120

SUPPLY VOLTAGE (V)

2.5

140

120

100

80

60

40

20

0

4.0

5.0

1196/98 G17

3.0

3.5

4.5

5.5

6.0

SUPPLY VOLTAGE (V)

2.5

1.9

1.7

1.5

1.3

1.1

0.9

0.7

0.5

4.0

5.0

1196/98 G16

3.0

3.5

4.5

5.5

6.0

*AS THE FREQUENCY IS DECREASED FROM 12MHz, MINIMUM CLOCK FREQUENCY (

∆ERROR ≤ 0.1LSB) REPRESENTS THE

FREQUENCY AT WHICH A 0.1LSB SHIFT IN ANY CODE TRANSITION FROM ITS 12MHz VALUE IS FIRST DETECTED.

Minimum Clock Rate for

0.1LSB* Error

SUPPLY VOLTAGE (V)

2.5

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0

4.0

5.0

1196/98 G14

3.0

3.5

4.5

5.5

6.0