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LTC1142CG Datasheet(PDF) 5 Page - Linear Technology |
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LTC1142CG Datasheet(HTML) 5 Page - Linear Technology |
5 / 20 page 5 LTC1142/LTC1142L/LTC1142HV CC HARA TERISTICS A TYPICALPERFOR CE INPUT VOLTAGE (V) 0 2.1 1.8 1.5 1.2 0.9 0.6 0.3 0 2 10 14 1142 G07 8 18 4 6 12 16 PER REGULATOR BLOCK NOT INCLUDING GATE CHARGE CURRENT PINS 10, 24 ACTIVE MODE SLEEP MODE INPUT VOLTAGE (V) 0 20 18 16 14 12 10 8 6 4 2 0 2 10 14 1142 G08 8 18 4 6 12 16 PER REGULATOR BLOCK PINS 10, 24 VSHUTDOWN = 2V VIN – VOUT VOLTAGE (V) 0 12 1142 G09 2 68 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 4 10 70°C 0°C 25°C VOUT = 5V OPERATING FREQUENCY (kHz) 20 140 28 24 20 16 12 8 4 0 1142 G10 80 260 200 QN + QP = 100nC QN + QP = 50nC OUTPUT VOLTAGE (V) 0 80 70 60 50 40 30 20 10 0 4 1142 G11 1 2 3 5 VSENSE = VOUT VOUT = 5V VOUT = 3.3V PI FU CTIO S Operating Frequency vs VIN – VOUT TEMPERATURE (°C) 0 175 150 125 100 75 50 25 0 80 1142 G12 20 40 60 100 MAXIMUM THRESHOLD MINIMUM THRESHOLD Current Sense Threshold Voltage Supply Current in Shutdown Off-Time vs Output Voltage DC Supply Current Gate Charge Supply Current LTC1142/LTC1142HV SENSE+3 (Pin 1): The (+) Input to the 3.3V Section Current Comparator. A built-in offset between Pins 1 and 28 in conjunction with RSENSE3 sets the current trip threshold for the 3.3V section. SHUTDOWN 3 (Pin 2): When grounded, the 3.3V section operates normally. Pulling Pin 2 high holds both MOSFETs off and puts the 3.3V section in micropower shutdown mode. Requires CMOS logic-level signal with tr, tf < 1µs. Do not “float” Pin 2. SGND3 (Pin 3): The 3.3V section small-signal ground must be routed separately from other grounds to the (–) terminal of the 3.3V section output capacitor. PGND3 (Pin 4): The 3.3V section driver power ground connects to source of N-channel MOSFET and the (–) terminal of the 3.3V section input capacitor. NC (Pin 5): No Connection. NDRIVE 3 (Pin 6): High Current Drive for Bottom N-Channel MOSFET, 3.3V Section. Voltage swing at Pin 6 is from ground to VIN3. |
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