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LTC2379-18 Datasheet(PDF) 10 Page - Linear Technology |
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LTC2379-18 Datasheet(HTML) 10 Page - Linear Technology |
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10 / 26 page  LTC2379-18 10 237918fa OVERVIEW The LTC2379-18 is a low noise, low power, high speed 18-bit successive approximation register (SAR) ADC. Operating from a single 2.5V supply, the LTC2379-18 supports a large and flexible ±VREF fully differential input range with VREF ranging from 2.5V to 5.1V, making it ideal for high performance applications which require a wide dynamic range. The LTC2379-18 achieves ±2LSB INL max, no missing codes at 18 bits and 101.2dB SNR. Fast 1.6Msps throughput with no cycle latency makes the LTC2379-18 ideally suited for a wide variety of high speed applications. An internal oscillator sets the con- version time, easing external timing considerations. The LTC2379-18 dissipates only 18mW at 1.6Msps, while an auto power-down feature is provided to further reduce power dissipation during inactive periods. The LTC2379-18 features a unique digital gain compres- sion (DGC) function, which eliminates the driver amplifier’s negative supply while preserving the full resolution of the ADC. When enabled, the ADC performs a digital scaling function that maps zero-scale code from 0V to 0.1 • VREF and full-scale code from VREF to 0.9 • VREF. For a typical reference voltage of 5V, the full-scale input range is now 0.5V to 4.5V, which provides adequate headroom for powering the driving amplifier from a single 5.5V supply. CONVERTER OPERATION The LTC2379-18 operates in two phases. During the ac- quisition phase, the charge redistribution capacitor D/A converter (CDAC) is connected to the IN+ and IN– pins to sample the differential analog input voltage. A rising edge on the CNV pin initiates a conversion. During the conversion phase, the 18-bit CDAC is sequenced through a succes- sive approximation algorithm, effectively comparing the sampled input with binary-weighted fractions of the refer- ence voltage (e.g. VREF/2, VREF/4 … VREF/262144) using the differential comparator. At the end of conversion, the CDAC output approximates the sampled analog input. The ADC control logic then prepares the 18-bit digital output code for serial transfer. APPLICATIONS INFORMATION Figure 2. LTC2379-18 Transfer Function INPUT VOLTAGE (V) 0V –1 LSB 237918 F02 011...111 011...110 000...001 000...000 100...000 100...001 111...110 1 LSB BIPOLAR ZERO 111...111 FSR/2 – 1LSB –FSR/2 FSR = +FS – –FS 1LSB = FSR/262144 TRANSFER FUNCTION The LTC2379-18 digitizes the full-scale voltage of 2 × REF into 218 levels, resulting in an LSB size of 38μV with REF = 5V. The ideal transfer function is shown in Figure 2. The output data is in 2’s complement format. RON 40Ω CIN 45pF RON 40Ω REF REF CIN 45pF IN+ IN– BIAS VOLTAGE 237918 F03 Figure 3. The Equivalent Circuit for the Differential Analog Input of the LTC2379-18 ANALOG INPUT The analog inputs of the LTC2379-18 are fully differential in order to maximize the signal swing that can be digitized. The analog inputs can be modeled by the equivalent circuit shown in Figure 3. The diodes at the input provide ESD protection. In the acquisition phase, each input sees ap- proximately 45pF (CIN) from the sampling CDAC in series with 40Ω (RON) from the on-resistance of the sampling switch. Any unwanted signal that is common to both inputs will be reduced by the common mode rejection of the ADC. The inputs draw a current spike while charging the CIN capacitors during acquisition. During conversion, the analog inputs draw only a small leakage current. |
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