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LT1930AES5 Datasheet(PDF) 6 Page - Linear Technology |
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LT1930AES5 Datasheet(HTML) 6 Page - Linear Technology |
6 / 12 page 6 LT1930/LT1930A APPLICATIONS INFORMATION CAPACITOR SELECTION Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple voltage. Multi-layer ceramic capacitors are an excellent choice, as they have extremely low ESR and are available in very small packages. X5R dielectrics are preferred, followed by X7R, as these materials retain the capacitance over wide voltage and temperature ranges. A 4.7 µF to 10µF output capacitor is sufficient for most applications, but systems with very low output currents may need only a 1 µFor2.2µF output capacitor. Solid tantalum or OSCON capacitors can be used, but they will occupy more board area than a ceramic and will have a higher ESR. Always use a capacitor with a sufficient voltage rating. Ceramic capacitors also make a good choice for the input decoupling capacitor, which should be placed as close as possible to the LT1930/LT1930A. A 1 µF to 4.7µF input capacitor is sufficient for most applications. Table 3 shows a list of several ceramic capacitor manufacturers. Consult the manufacturers for detailed information on their entire selection of ceramic parts. Table 3. Ceramic Capacitor Manufacturers Taiyo Yuden (408) 573-4150 www.t-yuden.com AVX (803) 448-9411 www.avxcorp.com Murata (714) 852-2001 www.murata.com The decision to use either low ESR (ceramic) capacitors or the higher ESR (tantalum or OSCON) capacitors can affect the stability of the overall system. The ESR of any capaci- tor, along with the capacitance itself, contributes a zero to the system. For the tantalum and OSCON capacitors, this zero is located at a lower frequency due to the higher value of the ESR, while the zero of a ceramic capacitor is at a much higher frequency and can generally be ignored. A phase lead zero can be intentionally introduced by placing a capacitor (C3) in parallel with the resistor (R1) between VOUT and VFB as shown in Figure 1. The frequency of the zero is determined by the following equation. ƒ= Z RC 1 21 3 π •• By choosing the appropriate values for the resistor and capacitor, the zero frequency can be designed to improve the phase margin of the overall converter. The typical target value for the zero frequency is between 35kHz to 55kHz. Figure 3 shows the transient response of the step- up converter from Figure 1 without the phase lead capaci- tor C3. The phase margin is reduced as evidenced by more ringing in both the output voltage and inductor current. A 10pF capacitor for C3 results in better phase margin, which is revealed in Figure 4 as a more damped response and less overshoot. Figure 5 shows the transient response when a 33 µF tantalum capacitor with no phase lead capacitor is used on the output. The higher output voltage ripple is revealed in the upper waveform as a set of double lines. The transient response is not greatly improved which implies that the ESR zero frequency is too high to increase the phase margin. VOUT 0.2V/DIV AC COUPLED ILI 0.5A/DIV AC COUPLED 250mA 150mA LOAD CURRENT 50 µs/DIV 1930 F03 Figure 3. Transient Response of Figure 1's Step-Up Converter without Phase Lead Capacitor Figure 4. Transient Response of Figure 1's Step-Up Converter with 10pF Phase Lead Capacitor VOUT 0.2V/DIV AC COUPLED ILI 0.5A/DIV AC COUPLED 250mA 150mA LOAD CURRENT 50 µs/DIV 1930 F04 |
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