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LT1680ISW Datasheet(PDF) 11 Page - Linear Technology |
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LT1680ISW Datasheet(HTML) 11 Page - Linear Technology |
11 / 16 page 11 LT1680 additional current can be minimized by making the con- nection through an external resistor (100k is typically used). When shutting down the LT1680, the RUN/SHDN pin volt- age must remain between the shutdown threshold (~1.13V) and a minimum shutdown control limit voltage (see Fig- ure 4) for a least 25 µs. If a digital input or fast moving clamp is used, this can be achieved by forcing a shutdown control voltage above the minimum limit or by using a simple integrator to increase the fall time of the input sig- nal. A single pole integrator stage must have a τ ≥ (7)(10–5). APPLICATIONS INFORMATION TEMPERATURE ( °C) 500 600 700 800 – 40 – 20 0 20 1680 F04 40 60 80 Figure 4. Minimum Shutdown Control Limit vs Temperature Figure 5 is an example of a digital control input clamp. A logic high signal pulls the RUN/SHDN pin above its turn- on threshold through the diode. When a shutdown (logic low) signal is received, the RUN/SHDN pin is forced to 0.95V via the resistor divider until shutdown is fully estab- lished and the 5VREF voltage collapses. R1 43k DIGITAL INPUT R2 10k 1N914 1680 F05 5VREF LT1680 RUN/SHDN Figure 6 is an example of a digital control integration stage at the RUN/SHDN input. The integrator has a τ = (10)(103) • (10)(10–9) = (1.0)(10–4). This circuit technique, however, delays initiation of controller shutdown about 125 µs from the reception of the shutdown signal (5V – 0V transition). Figure 5. Digital Input Shutdown Level Control R1 10k C1 10nF DIGITAL INPUT 1680 F06 RUN/SHDN LT1680 Figure 6. Digital Input Shutdown Integration Control Figure 7 is an example of an integrator stage coupled with a 24V input power supply sequencing circuit similar to that shown in Figure 3. The integrator stage allows use of an active shutdown clamp for implementation of both user- controlled shutdown and input power supply sequencing protection. Inductor Selection The inductor for an LT1680 converter is selected based on output power, operating frequency and efficiency require- 0.8V 1680 F08 2V 2.5V (vl) SYNC VCT (vh) FREE RUN SYNCHRONIZED Figure 8. Free Run and Synchronized Oscillator Waveforms (at CT Pin) R1 160k R2 10k SHDN R4 10k R3 390k VIN 24V C1 10nF 1680 F07 LT1680 5VREF RUN/SHDN Figure 7. Input Supply Sequencing with User-Controlled Shutdown Oscillator Synchronization The LT1680 oscillator generates a modified sawtooth waveform at the CT pin between low and high thresholds of 0.8V (vl) and 2.5V (vh) respectively. The oscillator can be synchronized by driving a TTL level pulse into the SYNC pin. This pin connects to a one shot circuit that reduces the oscillator high threshold to 2V for about 200ns. The SYNC input signal should have minimum on/off times of ≥1µs. |
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